From: jouni.hogander@nokia.com (Högander Jouni)
To: ext Rajendra Nayak <rnayak@ti.com>
Cc: "linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>,
"dderrick@ti.com" <dderrick@ti.com>,
"r-woodruff2@ti.com" <r-woodruff2@ti.com>
Subject: Re: [PATCH 02/04] OMAP3: PM: Prevent AUTO_RET and AUTO_OFF being enabled simultaneously
Date: Tue, 16 Jun 2009 15:39:49 +0300 [thread overview]
Message-ID: <87ws7cfj3e.fsf@trdhcp146196.ntc.nokia.com> (raw)
In-Reply-To: <1245153154-1876-2-git-send-email-rnayak@ti.com> (ext Rajendra Nayak's message of "Tue\, 16 Jun 2009 13\:52\:32 +0200")
ext Rajendra Nayak <rnayak@ti.com> writes:
> There is a design requirement in OMAP3 that Auto_RET and AUTO_OFF
> should not be set together. The PRCM FSM has been coded assuming
> that SW will set either auto_ret or auto_off bit depending on
> whether the core has been programmed to go into open switched
> logic retention state or OFF state. They are mutually exclusive.
So we don't have to do this if closed switch retention is used? (This
is what is currently used in linux-omap:pm)
> A similar issue will exist if SW sets auto_ret= auto_off=1 and
> auto_sleep = 1 in the PRM voltage CTRL register
>
> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
> ---
> arch/arm/mach-omap2/pm34xx.c | 12 ++++++++----
> 1 files changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
> index a9ef670..d4225b4 100644
> --- a/arch/arm/mach-omap2/pm34xx.c
> +++ b/arch/arm/mach-omap2/pm34xx.c
> @@ -392,6 +392,10 @@ void omap_sram_idle(void)
> OMAP3_PRM_VOLTCTRL_OFFSET);
> omap3_core_save_context();
> omap3_prcm_save_context();
> + } else if (core_next_state == PWRDM_POWER_RET) {
> + prm_set_mod_reg_bits(OMAP3430_AUTO_RET,
> + OMAP3430_GR_MOD,
> + OMAP3_PRM_VOLTCTRL_OFFSET);
> }
> /* Enable IO-PAD and IO-CHAIN wakeups */
> prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
> @@ -446,6 +450,10 @@ void omap_sram_idle(void)
> prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF,
> OMAP3430_GR_MOD,
> OMAP3_PRM_VOLTCTRL_OFFSET);
> + else if (core_next_state == PWRDM_POWER_RET)
> + prm_clear_mod_reg_bits(OMAP3430_AUTO_RET,
> + OMAP3430_GR_MOD,
> + OMAP3_PRM_VOLTCTRL_OFFSET);
> /* Enable smartreflex after WFI */
> enable_smartreflex(SR1);
> enable_smartreflex(SR2);
> @@ -1128,10 +1136,6 @@ static void __init configure_vc(void)
> OMAP3430_GR_MOD,
> OMAP3_PRM_VC_I2C_CFG_OFFSET);
>
> - /* Setup value for voltctrl */
> - prm_write_mod_reg(OMAP3430_AUTO_RET,
> - OMAP3430_GR_MOD, OMAP3_PRM_VOLTCTRL_OFFSET);
> -
> /* Write setup times */
> prm_write_mod_reg(prm_setup.clksetup, OMAP3430_GR_MOD,
> OMAP3_PRM_CLKSETUP_OFFSET);
> --
> 1.5.4.7
>
> --
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--
Jouni Högander
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next prev parent reply other threads:[~2009-06-16 12:41 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-06-16 11:52 [PATCH 01/04] OMAP3: PM: Disable PER DPLL idle before OFF, reduces OFF latency by 20ms Rajendra Nayak
2009-06-16 11:52 ` [PATCH 02/04] OMAP3: PM: Prevent AUTO_RET and AUTO_OFF being enabled simultaneously Rajendra Nayak
2009-06-16 11:52 ` [PATCH 03/04] OMAP3: PM: Fix I2C voltage levels send to T2 for different Power modes Rajendra Nayak
2009-06-16 11:52 ` [PATCH 04/04] OMAP3: PM: Update sleep/wakeup sequence and device grp associations Rajendra Nayak
2009-06-29 22:29 ` Kevin Hilman
2009-06-29 21:48 ` [PATCH 03/04] OMAP3: PM: Fix I2C voltage levels send to T2 for different Power modes Kevin Hilman
2009-06-16 12:39 ` Högander Jouni [this message]
2009-06-16 13:16 ` [PATCH 02/04] OMAP3: PM: Prevent AUTO_RET and AUTO_OFF being enabled simultaneously Nayak, Rajendra
2009-06-16 14:28 ` Kevin Hilman
[not found] ` <92CDD168D1E81F4F9D3839DC45903FC6536982E1@dlee03.ent.ti.com>
2009-06-16 17:28 ` Kevin Hilman
2009-06-17 16:52 ` Derrick, David
2009-06-17 6:27 ` Nayak, Rajendra
2009-06-29 21:45 ` Kevin Hilman
2009-06-16 12:52 ` [PATCH 01/04] OMAP3: PM: Disable PER DPLL idle before OFF, reduces OFF latency by 20ms Högander Jouni
2009-06-16 13:17 ` Nayak, Rajendra
2009-06-16 14:21 ` Kevin Hilman
2009-06-16 16:09 ` Derrick, David
2009-06-17 8:33 ` Paul Walmsley
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