OMAP 3530 - DPLL4 Clock

OMAP 3530 - DPLL4 Clock

[Danilo Caravana]

Hi all,

I'm using Linux kernel on my OMAP 3530 product, but i need the McSPI
running at exactly 6,5 Mhz.
The problem is that McSPI clocks is derived from DPLL4 which has a 96
MHz output.
I need to change the DPLL4 clock in Linux, and need everything else
working (Except USB, which need 48MHz).
Analysing the kernel code, I couldn't find where the DPLL4 is set, or
how can I change it without screw all others clocks.

Any help would be appreciated.

Thanks,

Danilo M. Caravana

Re: OMAP 3530 - DPLL4 Clock

[Paul Walmsley]

On Wed, 19 May 2010, Danilo Caravana wrote:

> I'm using Linux kernel on my OMAP 3530 product, but i need the McSPI 
> running at exactly 6,5 Mhz.  The problem is that McSPI clocks is derived 
> from DPLL4 which has a 96 MHz output.

You might be able to change the source of 48M_FCLK to come from the OMAP's 
sys_altclk ball via clk_set_parent(), and feed an external 6.5MHz clock 
(or some multiple) in sys_altclk.  HDQ/1WIRE, UART1, UART2 would be 
affected also, but maybe you don't need those.

Of course, that will probably mean a board change...

> I need to change the DPLL4 clock in Linux, and need everything else
> working (Except USB, which need 48MHz).

You could also try reducing the DPLL4 frequency with clk_set_rate(), but 
that really could affect many other peripherals.

USB should be clocked by DPLL5, so you should be safe there.

> Analysing the kernel code, I couldn't find where the DPLL4 is set

It's probably set by your bootloader, usually X-Loader or U-Boot.


- Paul