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* Self modifying code in ARM 11 architectures
@ 2011-05-24 10:15 Ashok Babu
  2011-05-24 10:18 ` Fwd: " Ashok Babu
  2011-05-25 16:28 ` Peter Teoh
  0 siblings, 2 replies; 5+ messages in thread
From: Ashok Babu @ 2011-05-24 10:15 UTC (permalink / raw)
  To: linux-omap, Kernelnewbies


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Hi All,

I am no success in booting up the ARM1176 processor with the linux-2.6.32
kernel.

While googling about the ARM Harvard architecture, I came to know that we
have to flush/invalidate the D-Cache and I-Cache
when using the self modifying codes.

So here my questions/doubts :
1) Is'nt it the kernel itself is self modifying code with lots of function
pointers ?
    If yes, how is synchronization b/w d-cache and i-cache handled in the
kernel ?
2) Can this be the reason for the kernel not booting for me ?
    Because If i disable the I-Cache in the config, then the kernel boots up
without any issues.

Any pointers on this will be of great help.

Thanks & Best Regards
Ashok

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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Fwd: Self modifying code in ARM 11 architectures
  2011-05-24 10:15 Self modifying code in ARM 11 architectures Ashok Babu
@ 2011-05-24 10:18 ` Ashok Babu
  2011-05-25  7:48   ` Vimal Singh
  2011-05-25 16:28 ` Peter Teoh
  1 sibling, 1 reply; 5+ messages in thread
From: Ashok Babu @ 2011-05-24 10:18 UTC (permalink / raw)
  To: linux-omap, linux-arm

Hi All,

I am no success in booting up the ARM1176 processor with the
linux-2.6.32 kernel.
While googling about the ARM Harvard architecture, I came to know that
we have to flush/invalidate the D-Cache and I-Cache
when using the self modifying codes.

So here my questions/doubts :
1) Is'nt it the kernel itself is self modifying code with lots of
function pointers ?
    If yes, how is synchronization b/w d-cache and i-cache handled in
the kernel ?
2) Can this be the reason for the kernel not booting for me ?
    Because If i disable the I-Cache in the config, then the kernel
boots up without any issues.
Any pointers on this will be of great help.

Thanks & Best Regards
Ashok
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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: Self modifying code in ARM 11 architectures
  2011-05-24 10:18 ` Fwd: " Ashok Babu
@ 2011-05-25  7:48   ` Vimal Singh
  2011-05-25 11:45     ` Uwe Kleine-König
  0 siblings, 1 reply; 5+ messages in thread
From: Vimal Singh @ 2011-05-25  7:48 UTC (permalink / raw)
  To: Ashok Babu; +Cc: linux-omap, linux-arm, linux-arm-kernel

CC'ing correct ARM mailing list.

On Tue, May 24, 2011 at 3:48 PM, Ashok Babu <ashok3d@gmail.com> wrote:
> Hi All,
>
> I am no success in booting up the ARM1176 processor with the
> linux-2.6.32 kernel.
> While googling about the ARM Harvard architecture, I came to know that
> we have to flush/invalidate the D-Cache and I-Cache
> when using the self modifying codes.
>
> So here my questions/doubts :
> 1) Is'nt it the kernel itself is self modifying code with lots of
> function pointers ?
>     If yes, how is synchronization b/w d-cache and i-cache handled in
> the kernel ?
> 2) Can this be the reason for the kernel not booting for me ?
>     Because If i disable the I-Cache in the config, then the kernel
> boots up without any issues.
> Any pointers on this will be of great help.
>
> Thanks & Best Regards
> Ashok
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>



-- 
Regards,
Vimal Singh
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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: Self modifying code in ARM 11 architectures
  2011-05-25  7:48   ` Vimal Singh
@ 2011-05-25 11:45     ` Uwe Kleine-König
  0 siblings, 0 replies; 5+ messages in thread
From: Uwe Kleine-König @ 2011-05-25 11:45 UTC (permalink / raw)
  To: Ashok Babu; +Cc: Vimal Singh, linux-omap, linux-arm-kernel, linux-arm

Hello,

On Wed, May 25, 2011 at 01:18:37PM +0530, Vimal Singh wrote:
> CC'ing correct ARM mailing list.
> 
> On Tue, May 24, 2011 at 3:48 PM, Ashok Babu <ashok3d@gmail.com> wrote:
> > Hi All,
> >
> > I am no success in booting up the ARM1176 processor with the
> > linux-2.6.32 kernel.
> > While googling about the ARM Harvard architecture, I came to know that
> > we have to flush/invalidate the D-Cache and I-Cache
> > when using the self modifying codes.
> >
> > So here my questions/doubts :
> > 1) Is'nt it the kernel itself is self modifying code with lots of
> > function pointers ?
Code that uses function pointer isn't usually called self-modifying.

> >     If yes, how is synchronization b/w d-cache and i-cache handled in
> > the kernel ?
> > 2) Can this be the reason for the kernel not booting for me ?
> >     Because If i disable the I-Cache in the config, then the kernel
> > boots up without any issues.
> > Any pointers on this will be of great help.
Does your bootloader correctly disables the I-Cache before giving control
to Linux?

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: Self modifying code in ARM 11 architectures
  2011-05-24 10:15 Self modifying code in ARM 11 architectures Ashok Babu
  2011-05-24 10:18 ` Fwd: " Ashok Babu
@ 2011-05-25 16:28 ` Peter Teoh
  1 sibling, 0 replies; 5+ messages in thread
From: Peter Teoh @ 2011-05-25 16:28 UTC (permalink / raw)
  To: Ashok Babu; +Cc: linux-omap, Kernelnewbies


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On Tue, May 24, 2011 at 6:15 PM, Ashok Babu <ashok3d@gmail.com> wrote:

> Hi All,
>
> I am no success in booting up the ARM1176 processor with the linux-2.6.32
> kernel.
>
> While googling about the ARM Harvard architecture, I came to know that we
> have to flush/invalidate the D-Cache and I-Cache
> when using the self modifying codes.
>
> So here my questions/doubts :
> 1) Is'nt it the kernel itself is self modifying code with lots of function
> pointers ?
>     If yes, how is synchronization b/w d-cache and i-cache handled in the
> kernel ?
> 2) Can this be the reason for the kernel not booting for me ?
>     Because If i disable the I-Cache in the config, then the kernel boots
> up without any issues.
>
> Any pointers on this will be of great help.
>
> Here:

http://blogs.arm.com/software-enablement/141-caches-and-self-modifying-code/

read the part on "The Solution" - it describe function pointer on a
register, and what u are supposed to do with cache transfer.   (java is full
of JIT compilation)
<http://blogs.arm.com/software-enablement/141-caches-and-self-modifying-code/>


> Thanks & Best Regards
> Ashok
>
>
>
>
> _______________________________________________
> Kernelnewbies mailing list
> Kernelnewbies@kernelnewbies.org
> http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies
>
>


-- 
Regards,
Peter Teoh

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end of thread, other threads:[~2011-05-25 16:28 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2011-05-24 10:15 Self modifying code in ARM 11 architectures Ashok Babu
2011-05-24 10:18 ` Fwd: " Ashok Babu
2011-05-25  7:48   ` Vimal Singh
2011-05-25 11:45     ` Uwe Kleine-König
2011-05-25 16:28 ` Peter Teoh

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