* [RESEND][PATCH 0/5] arm: omap: usb: Runtime PM support for EHCI and OHCI drivers
@ 2011-05-16 9:04 Keshava Munegowda
2011-05-16 9:04 ` Keshava Munegowda
0 siblings, 1 reply; 5+ messages in thread
From: Keshava Munegowda @ 2011-05-16 9:04 UTC (permalink / raw)
To: linux-usb, linux-omap, linux-kernel
Cc: Keshava Munegowda, balbi, gadiyar, sameo, parthab,
Keshava Munegowda
From: Keshava Munegowda <Keshava_mgowda@ti.com>
The Hwmod structures and Runtime PM features are implemented
For EHCI and OHCI drivers of OMAP3 and OMAP4.
The global suspend/resume of EHCI and OHCI
is validated on OMAP3430 sdp board with these patches.
Keshava Munegowda (5):
arm: omap: usb: ehci and ohci hwmod structures for omap3 and omap4
arm: omap: usb: register hwmods of usbhs
arm: omap: usb: device name change for the clk names of usbhs
arm: omap: usb: Runtime PM support
arm: omap: usb: global Suspend and resume support of ehci and ohci
arch/arm/mach-omap2/clock3xxx_data.c | 28 ++--
arch/arm/mach-omap2/clock44xx_data.c | 10 +-
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 184 ++++++++++++++++++++++
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 153 ++++++++++++++++++
arch/arm/mach-omap2/usb-host.c | 99 ++++--------
drivers/mfd/omap-usb-host.c | 236 +++++++++++++---------------
6 files changed, 504 insertions(+), 206 deletions(-)
^ permalink raw reply [flat|nested] 5+ messages in thread
* [RESEND][PATCH 0/5] arm: omap: usb: Runtime PM support for EHCI and OHCI drivers
2011-05-16 9:04 Keshava Munegowda
@ 2011-05-16 9:04 ` Keshava Munegowda
2011-05-16 9:13 ` Munegowda, Keshava
0 siblings, 1 reply; 5+ messages in thread
From: Keshava Munegowda @ 2011-05-16 9:04 UTC (permalink / raw)
To: linux-usb, linux-omap, linux-kernel
Cc: Keshava Munegowda, balbi, gadiyar, sameo, parthab
Following 2 hwmod strcuture are added:
UHH hwmod of usbhs with uhh base address and
EHCI , OHCI irq and base addresses.
TLL hwmod of usbhs with the TLL base address and irq.
Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 184 ++++++++++++++++++++++++++++
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 153 +++++++++++++++++++++++
2 files changed, 337 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 909a84d..fe9a176 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -84,6 +84,8 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod;
static struct omap_hwmod omap3xxx_mcbsp5_hwmod;
static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod;
static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod;
+static struct omap_hwmod omap34xx_usb_host_hs_hwmod;
+static struct omap_hwmod omap34xx_usb_tll_hs_hwmod;
/* L3 -> L4_CORE interface */
static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
@@ -3574,6 +3576,185 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
};
+/*
+ * 'usb_host_hs' class
+ * high-speed multi-port usb host controller
+ */
+static struct omap_hwmod_ocp_if omap34xx_usb_host_hs__l3_main_2 = {
+ .master = &omap34xx_usb_host_hs_hwmod,
+ .slave = &omap3xxx_l3_main_hwmod,
+ .clk = "core_l3_ick",
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_class_sysconfig omap34xx_usb_host_hs_sysc = {
+ .rev_offs = 0x0000,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0014,
+ .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+ MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+ .sysc_fields = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap34xx_usb_host_hs_hwmod_class = {
+ .name = "usbhs_uhh",
+ .sysc = &omap34xx_usb_host_hs_sysc,
+};
+
+static struct omap_hwmod_ocp_if *omap34xx_usb_host_hs_masters[] = {
+ &omap34xx_usb_host_hs__l3_main_2,
+};
+
+static struct omap_hwmod_irq_info omap34xx_usb_host_hs_irqs[] = {
+ { .name = "ohci-irq", .irq = 76 },
+ { .name = "ehci-irq", .irq = 77 },
+};
+
+static struct omap_hwmod_addr_space omap34xx_usb_host_hs_addrs[] = {
+ {
+ .name = "uhh",
+ .pa_start = 0x48064000,
+ .pa_end = 0x480643ff,
+ .flags = ADDR_TYPE_RT
+ },
+ {
+ .name = "ohci",
+ .pa_start = 0x48064400,
+ .pa_end = 0x480647FF,
+ .flags = ADDR_MAP_ON_INIT
+ },
+ {
+ .name = "ehci",
+ .pa_start = 0x48064800,
+ .pa_end = 0x48064CFF,
+ .flags = ADDR_MAP_ON_INIT
+ }
+};
+
+static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usb_host_hs = {
+ .master = &omap3xxx_l4_core_hwmod,
+ .slave = &omap34xx_usb_host_hs_hwmod,
+ .clk = "l4_ick",
+ .addr = omap34xx_usb_host_hs_addrs,
+ .addr_cnt = ARRAY_SIZE(omap34xx_usb_host_hs_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if omap34xx_f128m_cfg__usb_host_hs = {
+ .clk = "usbhost_120m_fck",
+ .user = OCP_USER_MPU,
+ .flags = OCPIF_SWSUP_IDLE,
+};
+
+static struct omap_hwmod_ocp_if omap34xx_f48m_cfg__usb_host_hs = {
+ .clk = "usbhost_48m_fck",
+ .user = OCP_USER_MPU,
+ .flags = OCPIF_SWSUP_IDLE,
+};
+
+static struct omap_hwmod_ocp_if *omap34xx_usb_host_hs_slaves[] = {
+ &omap34xx_l4_cfg__usb_host_hs,
+ &omap34xx_f128m_cfg__usb_host_hs,
+ &omap34xx_f48m_cfg__usb_host_hs,
+};
+
+static struct omap_hwmod omap34xx_usb_host_hs_hwmod = {
+ .name = "usbhs_uhh",
+ .class = &omap34xx_usb_host_hs_hwmod_class,
+ .mpu_irqs = omap34xx_usb_host_hs_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_usb_host_hs_irqs),
+ .main_clk = "usbhost_ick",
+ .prcm = {
+ .omap2 = {
+ .module_offs = OMAP3430ES2_USBHOST_MOD,
+ .prcm_reg_id = 1,
+ .module_bit = 0,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = 1,
+ .idlest_stdby_bit = 0,
+ },
+ },
+ .slaves = omap34xx_usb_host_hs_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap34xx_usb_host_hs_slaves),
+ .masters = omap34xx_usb_host_hs_masters,
+ .masters_cnt = ARRAY_SIZE(omap34xx_usb_host_hs_masters),
+ .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+/*
+ * 'usb_tll_hs' class
+ * usb_tll_hs module is the adapter on the usb_host_hs ports
+ */
+static struct omap_hwmod_class_sysconfig omap34xx_usb_tll_hs_sysc = {
+ .rev_offs = 0x0000,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0014,
+ .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap34xx_usb_tll_hs_hwmod_class = {
+ .name = "usbhs_tll",
+ .sysc = &omap34xx_usb_tll_hs_sysc,
+};
+
+static struct omap_hwmod_irq_info omap34xx_usb_tll_hs_irqs[] = {
+ { .name = "tll-irq", .irq = 78 },
+};
+
+static struct omap_hwmod_addr_space omap34xx_usb_tll_hs_addrs[] = {
+ {
+ .name = "tll",
+ .pa_start = 0x48062000,
+ .pa_end = 0x48062fff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap34xx_f_cfg__usb_tll_hs = {
+ .clk = "usbtll_fck",
+ .user = OCP_USER_MPU,
+ .flags = OCPIF_SWSUP_IDLE,
+};
+
+static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usb_tll_hs = {
+ .master = &omap3xxx_l4_core_hwmod,
+ .slave = &omap34xx_usb_tll_hs_hwmod,
+ .clk = "l4_ick",
+ .addr = omap34xx_usb_tll_hs_addrs,
+ .addr_cnt = ARRAY_SIZE(omap34xx_usb_tll_hs_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if *omap34xx_usb_tll_hs_slaves[] = {
+ &omap34xx_l4_cfg__usb_tll_hs,
+ &omap34xx_f_cfg__usb_tll_hs,
+};
+
+static struct omap_hwmod omap34xx_usb_tll_hs_hwmod = {
+ .name = "usbhs_tll",
+ .class = &omap34xx_usb_tll_hs_hwmod_class,
+ .mpu_irqs = omap34xx_usb_tll_hs_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_usb_tll_hs_irqs),
+ .main_clk = "usbtll_ick",
+ .prcm = {
+ .omap2 = {
+ .module_offs = CORE_MOD,
+ .prcm_reg_id = 3,
+ .module_bit = 2,
+ .idlest_reg_id = 3,
+ .idlest_idle_bit = 2,
+ },
+ },
+ .slaves = omap34xx_usb_tll_hs_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap34xx_usb_tll_hs_slaves),
+ .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
&omap3xxx_l3_main_hwmod,
&omap3xxx_l4_core_hwmod,
@@ -3656,6 +3837,9 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
/* usbotg for am35x */
&am35xx_usbhsotg_hwmod,
+ &omap34xx_usb_host_hs_hwmod,
+ &omap34xx_usb_tll_hs_hwmod,
+
NULL,
};
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index abc548a..d7112b0 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -66,6 +66,8 @@ static struct omap_hwmod omap44xx_mmc2_hwmod;
static struct omap_hwmod omap44xx_mpu_hwmod;
static struct omap_hwmod omap44xx_mpu_private_hwmod;
static struct omap_hwmod omap44xx_usb_otg_hs_hwmod;
+static struct omap_hwmod omap44xx_usb_host_hs_hwmod;
+static struct omap_hwmod omap44xx_usb_tll_hs_hwmod;
/*
* Interconnects omap_hwmod structures
@@ -5027,6 +5029,155 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
+/*
+ * 'usb_host_hs' class
+ * high-speed multi-port usb host controller
+ */
+static struct omap_hwmod_ocp_if omap44xx_usb_host_hs__l3_main_2 = {
+ .master = &omap44xx_usb_host_hs_hwmod,
+ .slave = &omap44xx_l3_main_2_hwmod,
+ .clk = "l3_div_ck",
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_class_sysconfig omap44xx_usb_host_hs_sysc = {
+ .rev_offs = 0x0000,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0014,
+ .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+ MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+ .sysc_fields = &omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class omap44xx_usb_host_hs_hwmod_class = {
+ .name = "usbhs_uhh",
+ .sysc = &omap44xx_usb_host_hs_sysc,
+};
+
+static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_masters[] = {
+ &omap44xx_usb_host_hs__l3_main_2,
+};
+
+static struct omap_hwmod_irq_info omap44xx_usb_host_hs_irqs[] = {
+ { .name = "ohci-irq", .irq = 76 + OMAP44XX_IRQ_GIC_START },
+ { .name = "ehci-irq", .irq = 77 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_usb_host_hs_addrs[] = {
+ {
+ .name = "uhh",
+ .pa_start = 0x4a064000,
+ .pa_end = 0x4a0647ff,
+ .flags = ADDR_TYPE_RT
+ },
+ {
+ .name = "ohci",
+ .pa_start = 0x4A064800,
+ .pa_end = 0x4A064BFF,
+ .flags = ADDR_MAP_ON_INIT
+ },
+ {
+ .name = "ehci",
+ .pa_start = 0x4A064C00,
+ .pa_end = 0x4A064FFF,
+ .flags = ADDR_MAP_ON_INIT
+ }
+};
+
+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_hs = {
+ .master = &omap44xx_l4_cfg_hwmod,
+ .slave = &omap44xx_usb_host_hs_hwmod,
+ .clk = "l4_div_ck",
+ .addr = omap44xx_usb_host_hs_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_slaves[] = {
+ &omap44xx_l4_cfg__usb_host_hs,
+};
+
+static struct omap_hwmod omap44xx_usb_host_hs_hwmod = {
+ .name = "usbhs_uhh",
+ .class = &omap44xx_usb_host_hs_hwmod_class,
+ .mpu_irqs = omap44xx_usb_host_hs_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_irqs),
+ .main_clk = "usb_host_hs_fck",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_usb_host_hs_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_slaves),
+ .masters = omap44xx_usb_host_hs_masters,
+ .masters_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_masters),
+ .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/*
+ * 'usb_tll_hs' class
+ * usb_tll_hs module is the adapter on the usb_host_hs ports
+ */
+static struct omap_hwmod_class_sysconfig omap44xx_usb_tll_hs_sysc = {
+ .rev_offs = 0x0000,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0014,
+ .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap44xx_usb_tll_hs_hwmod_class = {
+ .name = "usbhs_tll",
+ .sysc = &omap44xx_usb_tll_hs_sysc,
+};
+
+static struct omap_hwmod_irq_info omap44xx_usb_tll_hs_irqs[] = {
+ { .name = "tll-irq", .irq = 78 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_usb_tll_hs_addrs[] = {
+ {
+ .name = "tll",
+ .pa_start = 0x4a062000,
+ .pa_end = 0x4a063fff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_tll_hs = {
+ .master = &omap44xx_l4_cfg_hwmod,
+ .slave = &omap44xx_usb_tll_hs_hwmod,
+ .clk = "l4_div_ck",
+ .addr = omap44xx_usb_tll_hs_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if *omap44xx_usb_tll_hs_slaves[] = {
+ &omap44xx_l4_cfg__usb_tll_hs,
+};
+
+static struct omap_hwmod omap44xx_usb_tll_hs_hwmod = {
+ .name = "usbhs_tll",
+ .class = &omap44xx_usb_tll_hs_hwmod_class,
+ .mpu_irqs = omap44xx_usb_tll_hs_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_irqs),
+ .main_clk = "usb_tll_hs_ick",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_usb_tll_hs_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_slaves),
+ .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
/* dmm class */
@@ -5173,6 +5324,8 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
&omap44xx_wd_timer2_hwmod,
&omap44xx_wd_timer3_hwmod,
+ &omap44xx_usb_host_hs_hwmod,
+ &omap44xx_usb_tll_hs_hwmod,
NULL,
};
--
1.6.0.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [RESEND][PATCH 0/5] arm: omap: usb: Runtime PM support for EHCI and OHCI drivers
2011-05-16 9:04 ` Keshava Munegowda
@ 2011-05-16 9:13 ` Munegowda, Keshava
0 siblings, 0 replies; 5+ messages in thread
From: Munegowda, Keshava @ 2011-05-16 9:13 UTC (permalink / raw)
To: linux-usb, linux-omap, linux-kernel
Cc: Keshava Munegowda, balbi, gadiyar, sameo, parthab
Sorry ! Tis patch was 1/5 has different subjct;
Some problem with my email setup , I will send the series.
On Mon, May 16, 2011 at 2:34 PM, Keshava Munegowda
<keshava_mgowda@ti.com> wrote:
> Following 2 hwmod strcuture are added:
> UHH hwmod of usbhs with uhh base address and
> EHCI , OHCI irq and base addresses.
> TLL hwmod of usbhs with the TLL base address and irq.
>
> Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
> ---
> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 184 ++++++++++++++++++++++++++++
> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 153 +++++++++++++++++++++++
> 2 files changed, 337 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> index 909a84d..fe9a176 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> @@ -84,6 +84,8 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod;
> static struct omap_hwmod omap3xxx_mcbsp5_hwmod;
> static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod;
> static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod;
> +static struct omap_hwmod omap34xx_usb_host_hs_hwmod;
> +static struct omap_hwmod omap34xx_usb_tll_hs_hwmod;
>
> /* L3 -> L4_CORE interface */
> static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
> @@ -3574,6 +3576,185 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = {
> .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
> };
>
> +/*
> + * 'usb_host_hs' class
> + * high-speed multi-port usb host controller
> + */
> +static struct omap_hwmod_ocp_if omap34xx_usb_host_hs__l3_main_2 = {
> + .master = &omap34xx_usb_host_hs_hwmod,
> + .slave = &omap3xxx_l3_main_hwmod,
> + .clk = "core_l3_ick",
> + .user = OCP_USER_MPU,
> +};
> +
> +static struct omap_hwmod_class_sysconfig omap34xx_usb_host_hs_sysc = {
> + .rev_offs = 0x0000,
> + .sysc_offs = 0x0010,
> + .syss_offs = 0x0014,
> + .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
> + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
> + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
> + .sysc_fields = &omap_hwmod_sysc_type1,
> +};
> +
> +static struct omap_hwmod_class omap34xx_usb_host_hs_hwmod_class = {
> + .name = "usbhs_uhh",
> + .sysc = &omap34xx_usb_host_hs_sysc,
> +};
> +
> +static struct omap_hwmod_ocp_if *omap34xx_usb_host_hs_masters[] = {
> + &omap34xx_usb_host_hs__l3_main_2,
> +};
> +
> +static struct omap_hwmod_irq_info omap34xx_usb_host_hs_irqs[] = {
> + { .name = "ohci-irq", .irq = 76 },
> + { .name = "ehci-irq", .irq = 77 },
> +};
> +
> +static struct omap_hwmod_addr_space omap34xx_usb_host_hs_addrs[] = {
> + {
> + .name = "uhh",
> + .pa_start = 0x48064000,
> + .pa_end = 0x480643ff,
> + .flags = ADDR_TYPE_RT
> + },
> + {
> + .name = "ohci",
> + .pa_start = 0x48064400,
> + .pa_end = 0x480647FF,
> + .flags = ADDR_MAP_ON_INIT
> + },
> + {
> + .name = "ehci",
> + .pa_start = 0x48064800,
> + .pa_end = 0x48064CFF,
> + .flags = ADDR_MAP_ON_INIT
> + }
> +};
> +
> +static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usb_host_hs = {
> + .master = &omap3xxx_l4_core_hwmod,
> + .slave = &omap34xx_usb_host_hs_hwmod,
> + .clk = "l4_ick",
> + .addr = omap34xx_usb_host_hs_addrs,
> + .addr_cnt = ARRAY_SIZE(omap34xx_usb_host_hs_addrs),
> + .user = OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +static struct omap_hwmod_ocp_if omap34xx_f128m_cfg__usb_host_hs = {
> + .clk = "usbhost_120m_fck",
> + .user = OCP_USER_MPU,
> + .flags = OCPIF_SWSUP_IDLE,
> +};
> +
> +static struct omap_hwmod_ocp_if omap34xx_f48m_cfg__usb_host_hs = {
> + .clk = "usbhost_48m_fck",
> + .user = OCP_USER_MPU,
> + .flags = OCPIF_SWSUP_IDLE,
> +};
> +
> +static struct omap_hwmod_ocp_if *omap34xx_usb_host_hs_slaves[] = {
> + &omap34xx_l4_cfg__usb_host_hs,
> + &omap34xx_f128m_cfg__usb_host_hs,
> + &omap34xx_f48m_cfg__usb_host_hs,
> +};
> +
> +static struct omap_hwmod omap34xx_usb_host_hs_hwmod = {
> + .name = "usbhs_uhh",
> + .class = &omap34xx_usb_host_hs_hwmod_class,
> + .mpu_irqs = omap34xx_usb_host_hs_irqs,
> + .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_usb_host_hs_irqs),
> + .main_clk = "usbhost_ick",
> + .prcm = {
> + .omap2 = {
> + .module_offs = OMAP3430ES2_USBHOST_MOD,
> + .prcm_reg_id = 1,
> + .module_bit = 0,
> + .idlest_reg_id = 1,
> + .idlest_idle_bit = 1,
> + .idlest_stdby_bit = 0,
> + },
> + },
> + .slaves = omap34xx_usb_host_hs_slaves,
> + .slaves_cnt = ARRAY_SIZE(omap34xx_usb_host_hs_slaves),
> + .masters = omap34xx_usb_host_hs_masters,
> + .masters_cnt = ARRAY_SIZE(omap34xx_usb_host_hs_masters),
> + .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
> +};
> +
> +/*
> + * 'usb_tll_hs' class
> + * usb_tll_hs module is the adapter on the usb_host_hs ports
> + */
> +static struct omap_hwmod_class_sysconfig omap34xx_usb_tll_hs_sysc = {
> + .rev_offs = 0x0000,
> + .sysc_offs = 0x0010,
> + .syss_offs = 0x0014,
> + .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE),
> + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
> + .sysc_fields = &omap_hwmod_sysc_type1,
> +};
> +
> +static struct omap_hwmod_class omap34xx_usb_tll_hs_hwmod_class = {
> + .name = "usbhs_tll",
> + .sysc = &omap34xx_usb_tll_hs_sysc,
> +};
> +
> +static struct omap_hwmod_irq_info omap34xx_usb_tll_hs_irqs[] = {
> + { .name = "tll-irq", .irq = 78 },
> +};
> +
> +static struct omap_hwmod_addr_space omap34xx_usb_tll_hs_addrs[] = {
> + {
> + .name = "tll",
> + .pa_start = 0x48062000,
> + .pa_end = 0x48062fff,
> + .flags = ADDR_TYPE_RT
> + },
> +};
> +
> +static struct omap_hwmod_ocp_if omap34xx_f_cfg__usb_tll_hs = {
> + .clk = "usbtll_fck",
> + .user = OCP_USER_MPU,
> + .flags = OCPIF_SWSUP_IDLE,
> +};
> +
> +static struct omap_hwmod_ocp_if omap34xx_l4_cfg__usb_tll_hs = {
> + .master = &omap3xxx_l4_core_hwmod,
> + .slave = &omap34xx_usb_tll_hs_hwmod,
> + .clk = "l4_ick",
> + .addr = omap34xx_usb_tll_hs_addrs,
> + .addr_cnt = ARRAY_SIZE(omap34xx_usb_tll_hs_addrs),
> + .user = OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +static struct omap_hwmod_ocp_if *omap34xx_usb_tll_hs_slaves[] = {
> + &omap34xx_l4_cfg__usb_tll_hs,
> + &omap34xx_f_cfg__usb_tll_hs,
> +};
> +
> +static struct omap_hwmod omap34xx_usb_tll_hs_hwmod = {
> + .name = "usbhs_tll",
> + .class = &omap34xx_usb_tll_hs_hwmod_class,
> + .mpu_irqs = omap34xx_usb_tll_hs_irqs,
> + .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_usb_tll_hs_irqs),
> + .main_clk = "usbtll_ick",
> + .prcm = {
> + .omap2 = {
> + .module_offs = CORE_MOD,
> + .prcm_reg_id = 3,
> + .module_bit = 2,
> + .idlest_reg_id = 3,
> + .idlest_idle_bit = 2,
> + },
> + },
> + .slaves = omap34xx_usb_tll_hs_slaves,
> + .slaves_cnt = ARRAY_SIZE(omap34xx_usb_tll_hs_slaves),
> + .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
> +};
> +
> static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
> &omap3xxx_l3_main_hwmod,
> &omap3xxx_l4_core_hwmod,
> @@ -3656,6 +3837,9 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
> /* usbotg for am35x */
> &am35xx_usbhsotg_hwmod,
>
> + &omap34xx_usb_host_hs_hwmod,
> + &omap34xx_usb_tll_hs_hwmod,
> +
> NULL,
> };
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> index abc548a..d7112b0 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> @@ -66,6 +66,8 @@ static struct omap_hwmod omap44xx_mmc2_hwmod;
> static struct omap_hwmod omap44xx_mpu_hwmod;
> static struct omap_hwmod omap44xx_mpu_private_hwmod;
> static struct omap_hwmod omap44xx_usb_otg_hs_hwmod;
> +static struct omap_hwmod omap44xx_usb_host_hs_hwmod;
> +static struct omap_hwmod omap44xx_usb_tll_hs_hwmod;
>
> /*
> * Interconnects omap_hwmod structures
> @@ -5027,6 +5029,155 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
> .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
> };
>
> +/*
> + * 'usb_host_hs' class
> + * high-speed multi-port usb host controller
> + */
> +static struct omap_hwmod_ocp_if omap44xx_usb_host_hs__l3_main_2 = {
> + .master = &omap44xx_usb_host_hs_hwmod,
> + .slave = &omap44xx_l3_main_2_hwmod,
> + .clk = "l3_div_ck",
> + .user = OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +static struct omap_hwmod_class_sysconfig omap44xx_usb_host_hs_sysc = {
> + .rev_offs = 0x0000,
> + .sysc_offs = 0x0010,
> + .syss_offs = 0x0014,
> + .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
> + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
> + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
> + .sysc_fields = &omap_hwmod_sysc_type2,
> +};
> +
> +static struct omap_hwmod_class omap44xx_usb_host_hs_hwmod_class = {
> + .name = "usbhs_uhh",
> + .sysc = &omap44xx_usb_host_hs_sysc,
> +};
> +
> +static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_masters[] = {
> + &omap44xx_usb_host_hs__l3_main_2,
> +};
> +
> +static struct omap_hwmod_irq_info omap44xx_usb_host_hs_irqs[] = {
> + { .name = "ohci-irq", .irq = 76 + OMAP44XX_IRQ_GIC_START },
> + { .name = "ehci-irq", .irq = 77 + OMAP44XX_IRQ_GIC_START },
> +};
> +
> +static struct omap_hwmod_addr_space omap44xx_usb_host_hs_addrs[] = {
> + {
> + .name = "uhh",
> + .pa_start = 0x4a064000,
> + .pa_end = 0x4a0647ff,
> + .flags = ADDR_TYPE_RT
> + },
> + {
> + .name = "ohci",
> + .pa_start = 0x4A064800,
> + .pa_end = 0x4A064BFF,
> + .flags = ADDR_MAP_ON_INIT
> + },
> + {
> + .name = "ehci",
> + .pa_start = 0x4A064C00,
> + .pa_end = 0x4A064FFF,
> + .flags = ADDR_MAP_ON_INIT
> + }
> +};
> +
> +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_hs = {
> + .master = &omap44xx_l4_cfg_hwmod,
> + .slave = &omap44xx_usb_host_hs_hwmod,
> + .clk = "l4_div_ck",
> + .addr = omap44xx_usb_host_hs_addrs,
> + .addr_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_addrs),
> + .user = OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_slaves[] = {
> + &omap44xx_l4_cfg__usb_host_hs,
> +};
> +
> +static struct omap_hwmod omap44xx_usb_host_hs_hwmod = {
> + .name = "usbhs_uhh",
> + .class = &omap44xx_usb_host_hs_hwmod_class,
> + .mpu_irqs = omap44xx_usb_host_hs_irqs,
> + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_irqs),
> + .main_clk = "usb_host_hs_fck",
> + .prcm = {
> + .omap4 = {
> + .clkctrl_reg = OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL,
> + },
> + },
> + .slaves = omap44xx_usb_host_hs_slaves,
> + .slaves_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_slaves),
> + .masters = omap44xx_usb_host_hs_masters,
> + .masters_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_masters),
> + .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
> +};
> +
> +/*
> + * 'usb_tll_hs' class
> + * usb_tll_hs module is the adapter on the usb_host_hs ports
> + */
> +static struct omap_hwmod_class_sysconfig omap44xx_usb_tll_hs_sysc = {
> + .rev_offs = 0x0000,
> + .sysc_offs = 0x0010,
> + .syss_offs = 0x0014,
> + .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE),
> + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
> + .sysc_fields = &omap_hwmod_sysc_type1,
> +};
> +
> +static struct omap_hwmod_class omap44xx_usb_tll_hs_hwmod_class = {
> + .name = "usbhs_tll",
> + .sysc = &omap44xx_usb_tll_hs_sysc,
> +};
> +
> +static struct omap_hwmod_irq_info omap44xx_usb_tll_hs_irqs[] = {
> + { .name = "tll-irq", .irq = 78 + OMAP44XX_IRQ_GIC_START },
> +};
> +
> +static struct omap_hwmod_addr_space omap44xx_usb_tll_hs_addrs[] = {
> + {
> + .name = "tll",
> + .pa_start = 0x4a062000,
> + .pa_end = 0x4a063fff,
> + .flags = ADDR_TYPE_RT
> + },
> +};
> +
> +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_tll_hs = {
> + .master = &omap44xx_l4_cfg_hwmod,
> + .slave = &omap44xx_usb_tll_hs_hwmod,
> + .clk = "l4_div_ck",
> + .addr = omap44xx_usb_tll_hs_addrs,
> + .addr_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_addrs),
> + .user = OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +static struct omap_hwmod_ocp_if *omap44xx_usb_tll_hs_slaves[] = {
> + &omap44xx_l4_cfg__usb_tll_hs,
> +};
> +
> +static struct omap_hwmod omap44xx_usb_tll_hs_hwmod = {
> + .name = "usbhs_tll",
> + .class = &omap44xx_usb_tll_hs_hwmod_class,
> + .mpu_irqs = omap44xx_usb_tll_hs_irqs,
> + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_irqs),
> + .main_clk = "usb_tll_hs_ick",
> + .prcm = {
> + .omap4 = {
> + .clkctrl_reg = OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL,
> + },
> + },
> + .slaves = omap44xx_usb_tll_hs_slaves,
> + .slaves_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_slaves),
> + .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
> +};
> +
> static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
>
> /* dmm class */
> @@ -5173,6 +5324,8 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
> &omap44xx_wd_timer2_hwmod,
> &omap44xx_wd_timer3_hwmod,
>
> + &omap44xx_usb_host_hs_hwmod,
> + &omap44xx_usb_tll_hs_hwmod,
> NULL,
> };
>
> --
> 1.6.0.4
>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* [RESEND][PATCH 0/5] arm: omap: usb: Runtime PM support for EHCI and OHCI drivers
@ 2011-05-16 9:33 Keshava Munegowda
2011-05-16 12:38 ` Munegowda, Keshava
0 siblings, 1 reply; 5+ messages in thread
From: Keshava Munegowda @ 2011-05-16 9:33 UTC (permalink / raw)
To: linux-usb, linux-omap, linux-kernel
Cc: Keshava Munegowda, balbi, gadiyar, sameo, parthab,
Keshava Munegowda
From: Keshava Munegowda <Keshava_mgowda@ti.com>
The Hwmod structures and Runtime PM features are implemented
For EHCI and OHCI drivers of OMAP3 and OMAP4.
The global suspend/resume of EHCI and OHCI
is validated on OMAP3430 sdp board with these patches.
Keshava Munegowda (5):
arm: omap: usb: ehci and ohci hwmod structures for omap3 and omap4
arm: omap: usb: register hwmods of usbhs
arm: omap: usb: device name change for the clk names of usbhs
arm: omap: usb: Runtime PM support
arm: omap: usb: global Suspend and resume support of ehci and ohci
arch/arm/mach-omap2/clock3xxx_data.c | 28 ++--
arch/arm/mach-omap2/clock44xx_data.c | 10 +-
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 184 ++++++++++++++++++++++
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 153 ++++++++++++++++++
arch/arm/mach-omap2/usb-host.c | 99 ++++--------
drivers/mfd/omap-usb-host.c | 236 +++++++++++++---------------
6 files changed, 504 insertions(+), 206 deletions(-)
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [RESEND][PATCH 0/5] arm: omap: usb: Runtime PM support for EHCI and OHCI drivers
2011-05-16 9:33 [RESEND][PATCH 0/5] arm: omap: usb: Runtime PM support for EHCI and OHCI drivers Keshava Munegowda
@ 2011-05-16 12:38 ` Munegowda, Keshava
0 siblings, 0 replies; 5+ messages in thread
From: Munegowda, Keshava @ 2011-05-16 12:38 UTC (permalink / raw)
To: balbi
Cc: Keshava Munegowda, gadiyar, sameo, parthab, linux-usb, linux-omap,
linux-kernel
On Mon, May 16, 2011 at 3:03 PM, Keshava Munegowda
<keshava_mgowda@ti.com> wrote:
> From: Keshava Munegowda <Keshava_mgowda@ti.com>
>
> The Hwmod structures and Runtime PM features are implemented
> For EHCI and OHCI drivers of OMAP3 and OMAP4.
> The global suspend/resume of EHCI and OHCI
> is validated on OMAP3430 sdp board with these patches.
>
> Keshava Munegowda (5):
> arm: omap: usb: ehci and ohci hwmod structures for omap3 and omap4
> arm: omap: usb: register hwmods of usbhs
> arm: omap: usb: device name change for the clk names of usbhs
> arm: omap: usb: Runtime PM support
> arm: omap: usb: global Suspend and resume support of ehci and ohci
>
> arch/arm/mach-omap2/clock3xxx_data.c | 28 ++--
> arch/arm/mach-omap2/clock44xx_data.c | 10 +-
> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 184 ++++++++++++++++++++++
> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 153 ++++++++++++++++++
> arch/arm/mach-omap2/usb-host.c | 99 ++++--------
> drivers/mfd/omap-usb-host.c | 236 +++++++++++++---------------
> 6 files changed, 504 insertions(+), 206 deletions(-)
>
balbi
need your decision (ACK / review comments) on this series too.
Regards
Keshava
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2011-05-16 12:38 UTC | newest]
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2011-05-16 9:33 [RESEND][PATCH 0/5] arm: omap: usb: Runtime PM support for EHCI and OHCI drivers Keshava Munegowda
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