From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A0FD3271ED; Wed, 10 Dec 2025 18:10:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765390267; cv=none; b=TE0oacPru+ldhoS1aW0tHu7DxZ7IMLXyA88ZnEFeAeNdR0VfinJtgxZ7QMi9hgbJf7YMIMH+mkXIMJUab92+acSiNnb2UwzKy3OA+bZxd91RirzDI+JpN/VVKL6Nrzi3rYBik+xNA9n4XV3P+eq2XkLqwRr1bbyHglyeUL41EKY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765390267; c=relaxed/simple; bh=11D+FbyBRjBd7dRkaGNZbGmzx6wWeykWSe7o2lp4Unw=; h=Mime-Version:Content-Type:Date:Message-Id:Subject:Cc:To:From: References:In-Reply-To; b=S82qD8jgAnmGt+bo18UJFWCrHayWHUOO/MNIcBEAs8EsYRzbev9iEwsF+uqcJorDHt2+VhRG1BI0ck1f/Io5zg9A5TXqc31imZRShN4QbJWFVemAJUn3IahJ7cu4G4/zsExJO/2LNRc5oqxod/3Yw0b8UXbSuYppV4KbFbzOYcM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=O6jczRAH; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="O6jczRAH" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 46C371A20B2; Wed, 10 Dec 2025 18:10:56 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id D59F760714; Wed, 10 Dec 2025 18:10:55 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 63FF8103C8CB3; Wed, 10 Dec 2025 19:10:46 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1765390254; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=zHScQ9epIs7tSkBpcNfLT2ySqJpIcU3hl0yiRWEMSxU=; b=O6jczRAHlyE369TuBgKbSoI5sr+D8r2p/p/jJJNzLR9kXxPqm7i8xrI7fQB90odCyPIXe1 4YZEYdjGPIrzpd27WpJ88/6qed4b09CpY+O8jxnssomse8LoTt8CSvaA6wr3dlSpRtijCJ vAHmY6R0ZD1eQUyUZarC66Ne+Ux/2RcQd5t77tAyFL1OfRlXrUkmm1ZMn+BPB5r7RdTl7h Qk+hr7+AYIIFJwhZj0Tgwd+BKfz6bdCRIMotppabJdlVf4Bs8C4uOdOKVnpS/5nLW/u5hk /fANJbwQ2wd/+NdKjXBdlPyCrER7pQDgNesMJqkCFPh9spNiUJ1olbTsiUR65A== Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Wed, 10 Dec 2025 19:10:45 +0100 Message-Id: Subject: Re: [PATCH 03/21] drm/tilcdc: Remove simulate_vesa_sync flag Cc: "Markus Schneider-Pargmann" , "Louis Chauvet" , "Thomas Petazzoni" , "Miguel Gazquez" , , , , , To: "Kory Maincent (TI.com)" , "Jyri Sarha" , "Tomi Valkeinen" , "Maarten Lankhorst" , "Maxime Ripard" , "Thomas Zimmermann" , "David Airlie" , "Simona Vetter" , "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" , "Russell King" , "Bartosz Golaszewski" , "Tony Lindgren" , "Andrzej Hajda" , "Neil Armstrong" , "Robert Foss" , "Laurent Pinchart" , "Jonas Karlman" , "Jernej Skrabec" From: "Luca Ceresoli" X-Mailer: aerc 0.20.1 References: <20251126-feature_tilcdc-v1-0-49b9ef2e3aa0@bootlin.com> <20251126-feature_tilcdc-v1-3-49b9ef2e3aa0@bootlin.com> In-Reply-To: <20251126-feature_tilcdc-v1-3-49b9ef2e3aa0@bootlin.com> X-Last-TLS-Session-Version: TLSv1.3 Hi K=C3=B6ry, On Wed Nov 26, 2025 at 6:35 PM CET, Kory Maincent (TI.com) wrote: > The tilcdc hardware does not generate VESA-compliant sync signals. It > aligns the vertical sync (VS) on the second edge of the horizontal sync > (HS) instead of the first edge. To compensate for this hardware > behavior, the driver applies a timing adjustment in mode_fixup(). > > Previously, this adjustment was conditional based on the simulate_vesa_sy= nc > flag, which was only set when using external encoders. This appears > problematic because: > > 1. The timing adjustment seems needed for the hardware behavior regardles= s > of whether an external encoder is used > 2. The external encoder infrastructure is driver-specific and being > removed due to design issues > 3. Boards using tilcdc without bridges (e.g., am335x-evm, am335x-evmsk) > may not be getting the necessary timing adjustments > > Remove the simulate_vesa_sync flag and apply the VESA sync timing > adjustment unconditionally, ensuring consistent behavior across all > configurations. While it's unclear if the previous conditional behavior > was causing actual issues, the unconditional adjustment better reflects > the hardware's characteristics. > > Signed-off-by: Kory Maincent (TI.com) > --- > > Only few board currently use tilcdc not associated to a bridge like the > am335x_evm or the am335x-evmsk. Have you tested this change on any affected board? The change looks good to me but without some testing it would be risky. Luca -- Luca Ceresoli, Bootlin Embedded Linux and Kernel engineering https://bootlin.com