From: Santosh Shilimkar <santosh.shilimkar@ti.com>
To: Russell King - ARM Linux <linux@arm.linux.org.uk>,
linux-omap@vger.kernel.org
Subject: RE: More LDP stuff
Date: Thu, 6 Jan 2011 22:10:03 +0530 [thread overview]
Message-ID: <e65ceaf93735be6697c31d52325112d2@mail.gmail.com> (raw)
In-Reply-To: <20110106153653.GD1198@n2100.arm.linux.org.uk>
> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
> owner@vger.kernel.org] On Behalf Of Russell King - ARM Linux
> Sent: Thursday, January 06, 2011 9:07 PM
> To: linux-omap@vger.kernel.org
> Subject: More LDP stuff
>
> During boot, apart from the watchdog issue, I'm also seeing:
>
> Clocking rate (Crystal/Core/MPU): 26.0/266/500 MHz
> Reprogramming SDRC clock to 266000000 Hz
> dpll3_m2_clk rate change failed: -22
>
> Is that something to be concerned about?
>
DDR is not getting reconfigured and needs to rely on bootloder
settings. Should be ok because DVFS is not yet supported yet.
> ads7846 spi1.0: unable to get regulator: -19
>
> Is something missing from the ldp support code to declare this
> regulator?
Am not sure what is connected to SPI on LDP. But mostly
not an important peripheral.
>
> mmcblk0: retrying using single block read
> (repeated many times)
>
> Is the OMAP HSMMC driver really unable to handle multi-block read
> requests, or is something missing on the LDP to make it work?
Not sure.
Regards
Santosh
next prev parent reply other threads:[~2011-01-06 16:40 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-06 15:36 More LDP stuff Russell King - ARM Linux
2011-01-06 16:40 ` Santosh Shilimkar [this message]
2011-01-10 16:45 ` Mark Brown
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