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Subject: Re: [parisc-linux] C3000 and Promise Ultra100 TX2 PCI Controller
From: James Bottomley <James.Bottomley@steeleye.com>
To: Grant Grundler <grundler@parisc-linux.org>
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Date: 28 Feb 2004 11:24:53 -0600
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Cc: "M. Grabert" <xam@cs.ucc.ie>,
	PARISC list <parisc-linux@lists.parisc-linux.org>,
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On Sat, 2004-02-28 at 10:45, Grant Grundler wrote:
> include/asm/io.h:#define readw(addr) (*(volatile unsigned short *) __io_virt(addr))
> 
> 
> Uhoh..no swapping at all in this case.
> I was expecting readw to swap bytes.
> Am I just confused again about how a BE is supposed to behave?
> *sigh*

The rule is supposed to be that inX/outX/readX/writeX be free of
endianness issues on the bus.  i.e. doing a readw() on a memory mapped
PCI config space on parisc should have a le16_to_cpu implied in the
readw().

Obviously, accesses which go straight to memory (i.e. not via accessor
macros) are the responsibility of the driver for sorting out the
endianness.

James