From: Jeff Bailey <jbailey@raspberryginger.com>
To: John David Anglin <dave@hiauly1.hia.nrc.ca>
Cc: parisc-linux <parisc-linux@lists.parisc-linux.org>
Subject: [parisc-linux] Evening snapshot of gas patch
Date: Sun, 22 Oct 2006 23:24:37 -0400 [thread overview]
Message-ID: <1161573877.5629.50.camel@localhost.localdomain> (raw)
[-- Attachment #1.1.1: Type: text/plain, Size: 1779 bytes --]
This version of the patch is not suitable for inclusion, not sending it
to the binutils list.
The remaining unaddressed problem (until you guys find more, that is
*g*) is that the way I've done the hash table it gets setup once when
gas is started. This means that a LEVEL directive comes too late to
change the registers table. Nothing brilliant has come to mind yet for
a good way to solve this, but I'm back to my work week tomorrow, so
hopefully over the next few days something will pop into my head.
2006-10-21 Jeff Bailey <jbailey@raspberryginger.com>
* config/tc-hppa.c: Do not define DEFAULT_LEVEL.
Add variables for architecture size.
Add mach member to struct pd_reg and populate pre_defined_registers.
(need_pa11_opcode): Use bfd_mach_hppa11 instead of pa11 for
consistency.
(need_pa11_opcode): Use defines from bfd.h instead of magic numbers.
(pa_ip): Likewise.
(pa_level): Likewise.
(pa_parse_number): Use binutils hash instead of home-brew one.
(md_begin): Use defines from bfd.h instead of DEFAULT_LEVEL.
(init_default_arch): New function.
(hppa_target_format): New function.
(hppa_print_statistics): New function.
(reg_name_search): Removed.
(setup_reg_hash): New function.
* config/tc-hppa.h: Redefine TARGET_FORMAT as hppa_target_format()
and in terms of ELF_TARGET_FORMAT and ELF64_TARGET_FORMAT for OBJ_ELF.
Remove extra definitions of TRUE and FALSE.
Use elf64-hppa for 64 bit NetBSD.
* configure.in: Define DEFAULT_ARCH for hppa.
* configure.tgt: Specify arch for hppa and hppa64.
--
Jeff Bailey - http://www.raspberryginger.com/jbailey/
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Index: configure.in
===================================================================
RCS file: /cvs/src/src/gas/configure.in,v
retrieving revision 1.194
diff -u -p -r1.194 configure.in
--- configure.in 20 Sep 2006 11:35:11 -0000 1.194
+++ configure.in 23 Oct 2006 03:11:34 -0000
@@ -325,7 +325,7 @@ changequote([,])dnl
using_cgen=yes
;;
- i386 | s390 | sparc)
+ i386 | s390 | sparc | hppa)
if test $this_target = $target ; then
AC_DEFINE_UNQUOTED(DEFAULT_ARCH, "${arch}", [Default architecture.])
fi
Index: configure.tgt
===================================================================
RCS file: /cvs/src/src/gas/configure.tgt,v
retrieving revision 1.29
diff -u -p -r1.29 configure.tgt
--- configure.tgt 20 Sep 2006 11:35:11 -0000 1.29
+++ configure.tgt 23 Oct 2006 03:11:34 -0000
@@ -37,7 +37,8 @@ case ${cpu} in
c4x*) cpu_type=tic4x ;;
crisv32) cpu_type=cris arch=crisv32 ;;
crx*) cpu_type=crx endian=little ;;
- hppa*) cpu_type=hppa ;;
+ hppa) cpu_type=hppa arch=hppa;;
+ hppa64) cpu_type=hppa arch=hppa64;;
i[3-7]86) cpu_type=i386 arch=i386;;
ia64) cpu_type=ia64 ;;
ip2k) cpu_type=ip2k endian=big ;;
Index: config/tc-hppa.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-hppa.c,v
retrieving revision 1.132
diff -u -p -r1.132 tc-hppa.c
--- config/tc-hppa.c 7 Jun 2006 11:27:57 -0000 1.132
+++ config/tc-hppa.c 23 Oct 2006 03:11:34 -0000
@@ -44,6 +44,18 @@ error only one of OBJ_ELF and OBJ_SOM ca
/* A "convenient" place to put object file dependencies which do
not need to be seen outside of tc-hppa.c. */
+/* Either 32 or 64, selects file format. */
+static int hppa_arch_size;
+
+/* Store the BFD machine type */
+static unsigned long bfd_mach;
+
+/* The default architecture */
+#ifndef DEFAULT_ARCH
+#define DEFAULT_ARCH "hppa"
+#endif
+static char *default_arch = DEFAULT_ARCH;
+
/* Object file formats specify relocation types. */
typedef enum elf_hppa_reloc_type reloc_type;
@@ -52,14 +64,9 @@ typedef elf_symbol_type obj_symbol_type;
#define symbol_arg_reloc_info(sym)\
(((obj_symbol_type *) symbol_get_bfdsym (sym))->tc_data.hppa_arg_reloc)
-#if TARGET_ARCH_SIZE == 64
-/* How to generate a relocation. */
-#define hppa_gen_reloc_type _bfd_elf64_hppa_gen_reloc_type
-#define elf_hppa_reloc_final_type elf64_hppa_reloc_final_type
-#else
-#define hppa_gen_reloc_type _bfd_elf32_hppa_gen_reloc_type
-#define elf_hppa_reloc_final_type elf32_hppa_reloc_final_type
-#endif
+/* Function pointer to tell us how to generate a relocation. */
+elf_hppa_reloc_type** (*hppa_gen_reloc_type)(bfd*, elf_hppa_reloc_type, int, unsigned int, int, asymbol*);
+elf_hppa_reloc_type (*elf_hppa_reloc_final_type)(bfd*, elf_hppa_reloc_type, int, unsigned int);
/* ELF objects can have versions, but apparently do not have anywhere
to store a copyright string. */
@@ -105,12 +112,6 @@ typedef som_symbol_type obj_symbol_type;
#endif
#endif /* OBJ_SOM */
-#if TARGET_ARCH_SIZE == 64
-#define DEFAULT_LEVEL 25
-#else
-#define DEFAULT_LEVEL 10
-#endif
-
/* Various structures and types used internally in tc-hppa.c. */
/* Unwind table and descriptor. FIXME: Sync this with GDB version. */
@@ -466,6 +467,7 @@ struct hppa_fix_struct
struct pd_reg
{
char *name;
+ unsigned long mach;
int value;
};
@@ -485,6 +487,12 @@ struct selector_entry
int field_selector;
};
+/* Setup architecture information for 32 or 64 bit */
+static void init_default_arch (void);
+
+/* Setup register hash, called from init_default_arch */
+static void setup_reg_hash (void);
+
/* Prototypes for functions local to tc-hppa.c. */
#ifdef OBJ_SOM
@@ -661,226 +669,229 @@ static int print_errors = 1;
Almost every control register has a synonym; they are not listed
here for brevity.
- The table is sorted. Suitable for searching by a binary search. */
+ The table is sorted, but might have duplicate names if a register
+ is defined differently for different machines. See mrp for an
+ example. The more generally supported register definitions must
+ come LAST. */
static const struct pd_reg pre_defined_registers[] =
{
- {"%arg0", 26},
- {"%arg1", 25},
- {"%arg2", 24},
- {"%arg3", 23},
- {"%cr0", 0},
- {"%cr10", 10},
- {"%cr11", 11},
- {"%cr12", 12},
- {"%cr13", 13},
- {"%cr14", 14},
- {"%cr15", 15},
- {"%cr16", 16},
- {"%cr17", 17},
- {"%cr18", 18},
- {"%cr19", 19},
- {"%cr20", 20},
- {"%cr21", 21},
- {"%cr22", 22},
- {"%cr23", 23},
- {"%cr24", 24},
- {"%cr25", 25},
- {"%cr26", 26},
- {"%cr27", 27},
- {"%cr28", 28},
- {"%cr29", 29},
- {"%cr30", 30},
- {"%cr31", 31},
- {"%cr8", 8},
- {"%cr9", 9},
- {"%dp", 27},
- {"%eiem", 15},
- {"%eirr", 23},
- {"%farg0", 4 + FP_REG_BASE},
- {"%farg1", 5 + FP_REG_BASE},
- {"%farg2", 6 + FP_REG_BASE},
- {"%farg3", 7 + FP_REG_BASE},
- {"%fr0", 0 + FP_REG_BASE},
- {"%fr0l", 0 + FP_REG_BASE},
- {"%fr0r", 0 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr1", 1 + FP_REG_BASE},
- {"%fr10", 10 + FP_REG_BASE},
- {"%fr10l", 10 + FP_REG_BASE},
- {"%fr10r", 10 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr11", 11 + FP_REG_BASE},
- {"%fr11l", 11 + FP_REG_BASE},
- {"%fr11r", 11 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr12", 12 + FP_REG_BASE},
- {"%fr12l", 12 + FP_REG_BASE},
- {"%fr12r", 12 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr13", 13 + FP_REG_BASE},
- {"%fr13l", 13 + FP_REG_BASE},
- {"%fr13r", 13 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr14", 14 + FP_REG_BASE},
- {"%fr14l", 14 + FP_REG_BASE},
- {"%fr14r", 14 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr15", 15 + FP_REG_BASE},
- {"%fr15l", 15 + FP_REG_BASE},
- {"%fr15r", 15 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr16", 16 + FP_REG_BASE},
- {"%fr16l", 16 + FP_REG_BASE},
- {"%fr16r", 16 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr17", 17 + FP_REG_BASE},
- {"%fr17l", 17 + FP_REG_BASE},
- {"%fr17r", 17 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr18", 18 + FP_REG_BASE},
- {"%fr18l", 18 + FP_REG_BASE},
- {"%fr18r", 18 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr19", 19 + FP_REG_BASE},
- {"%fr19l", 19 + FP_REG_BASE},
- {"%fr19r", 19 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr1l", 1 + FP_REG_BASE},
- {"%fr1r", 1 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr2", 2 + FP_REG_BASE},
- {"%fr20", 20 + FP_REG_BASE},
- {"%fr20l", 20 + FP_REG_BASE},
- {"%fr20r", 20 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr21", 21 + FP_REG_BASE},
- {"%fr21l", 21 + FP_REG_BASE},
- {"%fr21r", 21 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr22", 22 + FP_REG_BASE},
- {"%fr22l", 22 + FP_REG_BASE},
- {"%fr22r", 22 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr23", 23 + FP_REG_BASE},
- {"%fr23l", 23 + FP_REG_BASE},
- {"%fr23r", 23 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr24", 24 + FP_REG_BASE},
- {"%fr24l", 24 + FP_REG_BASE},
- {"%fr24r", 24 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr25", 25 + FP_REG_BASE},
- {"%fr25l", 25 + FP_REG_BASE},
- {"%fr25r", 25 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr26", 26 + FP_REG_BASE},
- {"%fr26l", 26 + FP_REG_BASE},
- {"%fr26r", 26 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr27", 27 + FP_REG_BASE},
- {"%fr27l", 27 + FP_REG_BASE},
- {"%fr27r", 27 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr28", 28 + FP_REG_BASE},
- {"%fr28l", 28 + FP_REG_BASE},
- {"%fr28r", 28 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr29", 29 + FP_REG_BASE},
- {"%fr29l", 29 + FP_REG_BASE},
- {"%fr29r", 29 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr2l", 2 + FP_REG_BASE},
- {"%fr2r", 2 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr3", 3 + FP_REG_BASE},
- {"%fr30", 30 + FP_REG_BASE},
- {"%fr30l", 30 + FP_REG_BASE},
- {"%fr30r", 30 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr31", 31 + FP_REG_BASE},
- {"%fr31l", 31 + FP_REG_BASE},
- {"%fr31r", 31 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr3l", 3 + FP_REG_BASE},
- {"%fr3r", 3 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr4", 4 + FP_REG_BASE},
- {"%fr4l", 4 + FP_REG_BASE},
- {"%fr4r", 4 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr5", 5 + FP_REG_BASE},
- {"%fr5l", 5 + FP_REG_BASE},
- {"%fr5r", 5 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr6", 6 + FP_REG_BASE},
- {"%fr6l", 6 + FP_REG_BASE},
- {"%fr6r", 6 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr7", 7 + FP_REG_BASE},
- {"%fr7l", 7 + FP_REG_BASE},
- {"%fr7r", 7 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr8", 8 + FP_REG_BASE},
- {"%fr8l", 8 + FP_REG_BASE},
- {"%fr8r", 8 + FP_REG_BASE + FP_REG_RSEL},
- {"%fr9", 9 + FP_REG_BASE},
- {"%fr9l", 9 + FP_REG_BASE},
- {"%fr9r", 9 + FP_REG_BASE + FP_REG_RSEL},
- {"%fret", 4},
- {"%hta", 25},
- {"%iir", 19},
- {"%ior", 21},
- {"%ipsw", 22},
- {"%isr", 20},
- {"%itmr", 16},
- {"%iva", 14},
-#if TARGET_ARCH_SIZE == 64
- {"%mrp", 2},
-#else
- {"%mrp", 31},
-#endif
- {"%pcoq", 18},
- {"%pcsq", 17},
- {"%pidr1", 8},
- {"%pidr2", 9},
- {"%pidr3", 12},
- {"%pidr4", 13},
- {"%ppda", 24},
- {"%r0", 0},
- {"%r1", 1},
- {"%r10", 10},
- {"%r11", 11},
- {"%r12", 12},
- {"%r13", 13},
- {"%r14", 14},
- {"%r15", 15},
- {"%r16", 16},
- {"%r17", 17},
- {"%r18", 18},
- {"%r19", 19},
- {"%r2", 2},
- {"%r20", 20},
- {"%r21", 21},
- {"%r22", 22},
- {"%r23", 23},
- {"%r24", 24},
- {"%r25", 25},
- {"%r26", 26},
- {"%r27", 27},
- {"%r28", 28},
- {"%r29", 29},
- {"%r3", 3},
- {"%r30", 30},
- {"%r31", 31},
- {"%r4", 4},
- {"%r5", 5},
- {"%r6", 6},
- {"%r7", 7},
- {"%r8", 8},
- {"%r9", 9},
- {"%rctr", 0},
- {"%ret0", 28},
- {"%ret1", 29},
- {"%rp", 2},
- {"%sar", 11},
- {"%sp", 30},
- {"%sr0", 0},
- {"%sr1", 1},
- {"%sr2", 2},
- {"%sr3", 3},
- {"%sr4", 4},
- {"%sr5", 5},
- {"%sr6", 6},
- {"%sr7", 7},
- {"%t1", 22},
- {"%t2", 21},
- {"%t3", 20},
- {"%t4", 19},
- {"%tf1", 11},
- {"%tf2", 10},
- {"%tf3", 9},
- {"%tf4", 8},
- {"%tr0", 24},
- {"%tr1", 25},
- {"%tr2", 26},
- {"%tr3", 27},
- {"%tr4", 28},
- {"%tr5", 29},
- {"%tr6", 30},
- {"%tr7", 31}
+ {"%arg0", bfd_mach_hppa10, 26},
+ {"%arg1", bfd_mach_hppa10, 25},
+ {"%arg2", bfd_mach_hppa10, 24},
+ {"%arg3", bfd_mach_hppa10, 23},
+ {"%cr0", bfd_mach_hppa10, 0},
+ {"%cr10", bfd_mach_hppa10, 10},
+ {"%cr11", bfd_mach_hppa10, 11},
+ {"%cr12", bfd_mach_hppa10, 12},
+ {"%cr13", bfd_mach_hppa10, 13},
+ {"%cr14", bfd_mach_hppa10, 14},
+ {"%cr15", bfd_mach_hppa10, 15},
+ {"%cr16", bfd_mach_hppa10, 16},
+ {"%cr17", bfd_mach_hppa10, 17},
+ {"%cr18", bfd_mach_hppa10, 18},
+ {"%cr19", bfd_mach_hppa10, 19},
+ {"%cr20", bfd_mach_hppa10, 20},
+ {"%cr21", bfd_mach_hppa10, 21},
+ {"%cr22", bfd_mach_hppa10, 22},
+ {"%cr23", bfd_mach_hppa10, 23},
+ {"%cr24", bfd_mach_hppa10, 24},
+ {"%cr25", bfd_mach_hppa10, 25},
+ {"%cr26", bfd_mach_hppa10, 26},
+ {"%cr27", bfd_mach_hppa10, 27},
+ {"%cr28", bfd_mach_hppa10, 28},
+ {"%cr29", bfd_mach_hppa10, 29},
+ {"%cr30", bfd_mach_hppa10, 30},
+ {"%cr31", bfd_mach_hppa10, 31},
+ {"%cr8", bfd_mach_hppa10, 8},
+ {"%cr9", bfd_mach_hppa10, 9},
+ {"%dp", bfd_mach_hppa10, 27},
+ {"%eiem", bfd_mach_hppa10, 15},
+ {"%eirr", bfd_mach_hppa10, 23},
+ {"%farg0", bfd_mach_hppa10, 4 + FP_REG_BASE},
+ {"%farg1", bfd_mach_hppa10, 5 + FP_REG_BASE},
+ {"%farg2", bfd_mach_hppa10, 6 + FP_REG_BASE},
+ {"%farg3", bfd_mach_hppa10, 7 + FP_REG_BASE},
+ {"%fr0", bfd_mach_hppa10, 0 + FP_REG_BASE},
+ {"%fr0l", bfd_mach_hppa11, 0 + FP_REG_BASE},
+ {"%fr0r", bfd_mach_hppa11, 0 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr1", bfd_mach_hppa10, 1 + FP_REG_BASE},
+ {"%fr10", bfd_mach_hppa10, 10 + FP_REG_BASE},
+ {"%fr10l", bfd_mach_hppa11, 10 + FP_REG_BASE},
+ {"%fr10r", bfd_mach_hppa11, 10 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr11", bfd_mach_hppa10, 11 + FP_REG_BASE},
+ {"%fr11l", bfd_mach_hppa11, 11 + FP_REG_BASE},
+ {"%fr11r", bfd_mach_hppa11, 11 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr12", bfd_mach_hppa10, 12 + FP_REG_BASE},
+ {"%fr12l", bfd_mach_hppa11, 12 + FP_REG_BASE},
+ {"%fr12r", bfd_mach_hppa11, 12 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr13", bfd_mach_hppa10, 13 + FP_REG_BASE},
+ {"%fr13l", bfd_mach_hppa11, 13 + FP_REG_BASE},
+ {"%fr13r", bfd_mach_hppa11, 13 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr14", bfd_mach_hppa10, 14 + FP_REG_BASE},
+ {"%fr14l", bfd_mach_hppa11, 14 + FP_REG_BASE},
+ {"%fr14r", bfd_mach_hppa11, 14 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr15", bfd_mach_hppa10, 15 + FP_REG_BASE},
+ {"%fr15l", bfd_mach_hppa11, 15 + FP_REG_BASE},
+ {"%fr15r", bfd_mach_hppa11, 15 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr16", bfd_mach_hppa11, 16 + FP_REG_BASE},
+ {"%fr16l", bfd_mach_hppa11, 16 + FP_REG_BASE},
+ {"%fr16r", bfd_mach_hppa11, 16 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr17", bfd_mach_hppa11, 17 + FP_REG_BASE},
+ {"%fr17l", bfd_mach_hppa11, 17 + FP_REG_BASE},
+ {"%fr17r", bfd_mach_hppa11, 17 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr18", bfd_mach_hppa11, 18 + FP_REG_BASE},
+ {"%fr18l", bfd_mach_hppa11, 18 + FP_REG_BASE},
+ {"%fr18r", bfd_mach_hppa11, 18 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr19", bfd_mach_hppa11, 19 + FP_REG_BASE},
+ {"%fr19l", bfd_mach_hppa11, 19 + FP_REG_BASE},
+ {"%fr19r", bfd_mach_hppa11, 19 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr1l", bfd_mach_hppa11, 1 + FP_REG_BASE},
+ {"%fr1r", bfd_mach_hppa11, 1 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr2", bfd_mach_hppa10, 2 + FP_REG_BASE},
+ {"%fr20", bfd_mach_hppa11, 20 + FP_REG_BASE},
+ {"%fr20l", bfd_mach_hppa11, 20 + FP_REG_BASE},
+ {"%fr20r", bfd_mach_hppa11, 20 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr21", bfd_mach_hppa11, 21 + FP_REG_BASE},
+ {"%fr21l", bfd_mach_hppa11, 21 + FP_REG_BASE},
+ {"%fr21r", bfd_mach_hppa11, 21 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr22", bfd_mach_hppa11, 22 + FP_REG_BASE},
+ {"%fr22l", bfd_mach_hppa11, 22 + FP_REG_BASE},
+ {"%fr22r", bfd_mach_hppa11, 22 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr23", bfd_mach_hppa11, 23 + FP_REG_BASE},
+ {"%fr23l", bfd_mach_hppa11, 23 + FP_REG_BASE},
+ {"%fr23r", bfd_mach_hppa11, 23 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr24", bfd_mach_hppa11, 24 + FP_REG_BASE},
+ {"%fr24l", bfd_mach_hppa11, 24 + FP_REG_BASE},
+ {"%fr24r", bfd_mach_hppa11, 24 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr25", bfd_mach_hppa11, 25 + FP_REG_BASE},
+ {"%fr25l", bfd_mach_hppa11, 25 + FP_REG_BASE},
+ {"%fr25r", bfd_mach_hppa11, 25 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr26", bfd_mach_hppa11, 26 + FP_REG_BASE},
+ {"%fr26l", bfd_mach_hppa11, 26 + FP_REG_BASE},
+ {"%fr26r", bfd_mach_hppa11, 26 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr27", bfd_mach_hppa11, 27 + FP_REG_BASE},
+ {"%fr27l", bfd_mach_hppa11, 27 + FP_REG_BASE},
+ {"%fr27r", bfd_mach_hppa11, 27 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr28", bfd_mach_hppa11, 28 + FP_REG_BASE},
+ {"%fr28l", bfd_mach_hppa11, 28 + FP_REG_BASE},
+ {"%fr28r", bfd_mach_hppa11, 28 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr29", bfd_mach_hppa11, 29 + FP_REG_BASE},
+ {"%fr29l", bfd_mach_hppa11, 29 + FP_REG_BASE},
+ {"%fr29r", bfd_mach_hppa11, 29 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr2l", bfd_mach_hppa11, 2 + FP_REG_BASE},
+ {"%fr2r", bfd_mach_hppa11, 2 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr3", bfd_mach_hppa10, 3 + FP_REG_BASE},
+ {"%fr30", bfd_mach_hppa11, 30 + FP_REG_BASE},
+ {"%fr30l", bfd_mach_hppa11, 30 + FP_REG_BASE},
+ {"%fr30r", bfd_mach_hppa11, 30 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr31", bfd_mach_hppa11, 31 + FP_REG_BASE},
+ {"%fr31l", bfd_mach_hppa11, 31 + FP_REG_BASE},
+ {"%fr31r", bfd_mach_hppa11, 31 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr3l", bfd_mach_hppa11, 3 + FP_REG_BASE},
+ {"%fr3r", bfd_mach_hppa11, 3 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr4", bfd_mach_hppa10, 4 + FP_REG_BASE},
+ {"%fr4l", bfd_mach_hppa11, 4 + FP_REG_BASE},
+ {"%fr4r", bfd_mach_hppa11, 4 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr5", bfd_mach_hppa10, 5 + FP_REG_BASE},
+ {"%fr5l", bfd_mach_hppa11, 5 + FP_REG_BASE},
+ {"%fr5r", bfd_mach_hppa11, 5 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr6", bfd_mach_hppa10, 6 + FP_REG_BASE},
+ {"%fr6l", bfd_mach_hppa11, 6 + FP_REG_BASE},
+ {"%fr6r", bfd_mach_hppa11, 6 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr7", bfd_mach_hppa10, 7 + FP_REG_BASE},
+ {"%fr7l", bfd_mach_hppa11, 7 + FP_REG_BASE},
+ {"%fr7r", bfd_mach_hppa11, 7 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr8", bfd_mach_hppa10, 8 + FP_REG_BASE},
+ {"%fr8l", bfd_mach_hppa11, 8 + FP_REG_BASE},
+ {"%fr8r", bfd_mach_hppa11, 8 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fr9", bfd_mach_hppa10, 9 + FP_REG_BASE},
+ {"%fr9l", bfd_mach_hppa11, 9 + FP_REG_BASE},
+ {"%fr9r", bfd_mach_hppa11, 9 + FP_REG_BASE + FP_REG_RSEL},
+ {"%fret", bfd_mach_hppa10, 4},
+ {"%hta", bfd_mach_hppa10, 25},
+ {"%iir", bfd_mach_hppa10, 19},
+ {"%ior", bfd_mach_hppa10, 21},
+ {"%ipsw", bfd_mach_hppa10, 22},
+ {"%isr", bfd_mach_hppa10, 20},
+ {"%itmr", bfd_mach_hppa10, 16},
+ {"%iva", bfd_mach_hppa10, 14},
+ {"%mrp", bfd_mach_hppa20w, 2},
+ {"%mrp", bfd_mach_hppa10, 31},
+ {"%pcoq", bfd_mach_hppa10, 18},
+ {"%pcsq", bfd_mach_hppa10, 17},
+ {"%pidr1", bfd_mach_hppa10, 8},
+ {"%pidr2", bfd_mach_hppa10, 9},
+ {"%pidr3", bfd_mach_hppa10, 12},
+ {"%pidr4", bfd_mach_hppa10, 13},
+ {"%ppda", bfd_mach_hppa10, 24},
+ {"%r0", bfd_mach_hppa10, 0},
+ {"%r1", bfd_mach_hppa10, 1},
+ {"%r10", bfd_mach_hppa10, 10},
+ {"%r11", bfd_mach_hppa10, 11},
+ {"%r12", bfd_mach_hppa10, 12},
+ {"%r13", bfd_mach_hppa10, 13},
+ {"%r14", bfd_mach_hppa10, 14},
+ {"%r15", bfd_mach_hppa10, 15},
+ {"%r16", bfd_mach_hppa10, 16},
+ {"%r17", bfd_mach_hppa10, 17},
+ {"%r18", bfd_mach_hppa10, 18},
+ {"%r19", bfd_mach_hppa10, 19},
+ {"%r2", bfd_mach_hppa10, 2},
+ {"%r20", bfd_mach_hppa10, 20},
+ {"%r21", bfd_mach_hppa10, 21},
+ {"%r22", bfd_mach_hppa10, 22},
+ {"%r23", bfd_mach_hppa10, 23},
+ {"%r24", bfd_mach_hppa10, 24},
+ {"%r25", bfd_mach_hppa10, 25},
+ {"%r26", bfd_mach_hppa10, 26},
+ {"%r27", bfd_mach_hppa10, 27},
+ {"%r28", bfd_mach_hppa10, 28},
+ {"%r29", bfd_mach_hppa10, 29},
+ {"%r3", bfd_mach_hppa10, 3},
+ {"%r30", bfd_mach_hppa10, 30},
+ {"%r31", bfd_mach_hppa10, 31},
+ {"%r4", bfd_mach_hppa10, 4},
+ {"%r5", bfd_mach_hppa10, 5},
+ {"%r6", bfd_mach_hppa10, 6},
+ {"%r7", bfd_mach_hppa10, 7},
+ {"%r8", bfd_mach_hppa10, 8},
+ {"%r9", bfd_mach_hppa10, 9},
+ {"%rctr", bfd_mach_hppa10, 0},
+ {"%ret0", bfd_mach_hppa10, 28},
+ {"%ret1", bfd_mach_hppa10, 29},
+ {"%rp", bfd_mach_hppa10, 2},
+ {"%sar", bfd_mach_hppa10, 11},
+ {"%sp", bfd_mach_hppa10, 30},
+ {"%sr0", bfd_mach_hppa10, 0},
+ {"%sr1", bfd_mach_hppa10, 1},
+ {"%sr2", bfd_mach_hppa10, 2},
+ {"%sr3", bfd_mach_hppa10, 3},
+ {"%sr4", bfd_mach_hppa10, 4},
+ {"%sr5", bfd_mach_hppa10, 5},
+ {"%sr6", bfd_mach_hppa10, 6},
+ {"%sr7", bfd_mach_hppa10, 7},
+ {"%t1", bfd_mach_hppa10, 22},
+ {"%t2", bfd_mach_hppa10, 21},
+ {"%t3", bfd_mach_hppa10, 20},
+ {"%t4", bfd_mach_hppa10, 19},
+ {"%tf1", bfd_mach_hppa10, 11},
+ {"%tf2", bfd_mach_hppa10, 10},
+ {"%tf3", bfd_mach_hppa10, 9},
+ {"%tf4", bfd_mach_hppa10, 8},
+ {"%tr0", bfd_mach_hppa10, 24},
+ {"%tr1", bfd_mach_hppa10, 25},
+ {"%tr2", bfd_mach_hppa10, 26},
+ {"%tr3", bfd_mach_hppa10, 27},
+ {"%tr4", bfd_mach_hppa10, 28},
+ {"%tr5", bfd_mach_hppa10, 29},
+ {"%tr6", bfd_mach_hppa10, 30},
+ {"%tr7", bfd_mach_hppa10, 31}
};
+/* Hash table for register lookup. */
+static struct hash_control *reg_hash;
+
/* This table is sorted by order of the length of the string. This is
so we check for <> before we check for <. If we had a <> and checked
for < first, we would get a false match. */
@@ -2030,34 +2041,6 @@ is_end_of_statement (void)
#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
-/* Given NAME, find the register number associated with that name, return
- the integer value associated with the given name or -1 on failure. */
-
-static int
-reg_name_search (char *name)
-{
- int middle, low, high;
- int cmp;
-
- low = 0;
- high = REG_NAME_CNT - 1;
-
- do
- {
- middle = (low + high) / 2;
- cmp = strcasecmp (name, pre_defined_registers[middle].name);
- if (cmp < 0)
- high = middle - 1;
- else if (cmp > 0)
- low = middle + 1;
- else
- return pre_defined_registers[middle].value;
- }
- while (low <= high);
-
- return -1;
-}
-
/* Read a number from S. The number might come in one of many forms,
the most common will be a hex or decimal constant, but it could be
a pre-defined register (Yuk!), or an absolute symbol.
@@ -2080,9 +2063,9 @@ pa_parse_number (char **s, int is_float)
char *name;
char c;
symbolS *sym;
- int status;
char *p = *s;
bfd_boolean have_prefix;
+ const struct pd_reg *r;
/* Skip whitespace before the number. */
while (*p == ' ' || *p == '\t')
@@ -2188,9 +2171,9 @@ pa_parse_number (char **s, int is_float)
c = *p;
}
*p = 0;
- status = reg_name_search (name);
- if (status >= 0)
- num = status;
+ r = (const struct pd_reg *) hash_find (reg_hash, name);
+ if (r != NULL)
+ num = r->value;
else
{
if (print_errors)
@@ -2271,9 +2254,9 @@ need_pa11_opcode (void)
{
/* If this instruction is specific to a particular architecture,
then set a new architecture. */
- if (bfd_get_mach (stdoutput) < pa11)
+ if (bfd_get_mach (stdoutput) < bfd_mach_hppa11)
{
- if (!bfd_set_arch_mach (stdoutput, bfd_arch_hppa, pa11))
+ if (!bfd_set_arch_mach (stdoutput, bfd_arch_hppa, bfd_mach_hppa11))
as_warn (_("could not update architecture and machine"));
}
return TRUE;
@@ -3283,7 +3266,7 @@ pa_ip (char *str)
the_insn.reloc = R_HPPA_NONE;
- if (insn->arch >= pa20
+ if (insn->arch >= bfd_mach_hppa20
&& bfd_get_mach (stdoutput) < insn->arch)
goto failed;
@@ -4714,7 +4697,7 @@ pa_ip (char *str)
/* Handle 14 bit immediate, shifted left three times. */
case '#':
- if (bfd_get_mach (stdoutput) != pa20)
+ if (bfd_get_mach (stdoutput) != bfd_mach_hppa20)
break;
the_insn.field_selector = pa_chk_field_selector (&s);
get_expression (s);
@@ -6834,25 +6817,25 @@ pa_level (int unused ATTRIBUTE_UNUSED)
if (strncmp (level, "1.0", 3) == 0)
{
input_line_pointer += 3;
- if (!bfd_set_arch_mach (stdoutput, bfd_arch_hppa, 10))
+ if (!bfd_set_arch_mach (stdoutput, bfd_arch_hppa, bfd_mach_hppa10))
as_warn (_("could not set architecture and machine"));
}
else if (strncmp (level, "1.1", 3) == 0)
{
input_line_pointer += 3;
- if (!bfd_set_arch_mach (stdoutput, bfd_arch_hppa, 11))
+ if (!bfd_set_arch_mach (stdoutput, bfd_arch_hppa, bfd_mach_hppa11))
as_warn (_("could not set architecture and machine"));
}
else if (strncmp (level, "2.0w", 4) == 0)
{
input_line_pointer += 4;
- if (!bfd_set_arch_mach (stdoutput, bfd_arch_hppa, 25))
+ if (!bfd_set_arch_mach (stdoutput, bfd_arch_hppa, bfd_mach_hppa20w))
as_warn (_("could not set architecture and machine"));
}
else if (strncmp (level, "2.0", 3) == 0)
{
input_line_pointer += 3;
- if (!bfd_set_arch_mach (stdoutput, bfd_arch_hppa, 20))
+ if (!bfd_set_arch_mach (stdoutput, bfd_arch_hppa, bfd_mach_hppa20))
as_warn (_("could not set architecture and machine"));
}
else
@@ -8259,7 +8242,7 @@ md_begin (void)
call_info_root = NULL;
/* Set the default machine type. */
- if (!bfd_set_arch_mach (stdoutput, bfd_arch_hppa, DEFAULT_LEVEL))
+ if (!bfd_set_arch_mach (stdoutput, bfd_arch_hppa, bfd_mach))
as_warn (_("could not set architecture and machine"));
/* Folding of text and data segments fails miserably on the PA.
@@ -8580,6 +8563,84 @@ pa_vtable_entry (int ignore ATTRIBUTE_UN
}
static void
+init_default_arch ()
+{
+/* Cannot make both available until bfd is merged */
+#if TARGET_ARCH_SIZE == 64
+ if (strcmp (default_arch, "hppa64") == 0)
+ {
+ /* How to generate a relocation. */
+ hppa_gen_reloc_type = _bfd_elf64_hppa_gen_reloc_type;
+ elf_hppa_reloc_final_type = elf64_hppa_reloc_final_type;
+ hppa_arch_size = 64;
+ bfd_mach = bfd_mach_hppa20w;
+ } else
+#else
+ if (strcmp (default_arch, "hppa") == 0)
+ {
+ /* How to generate a relocation. */
+ hppa_gen_reloc_type = _bfd_elf32_hppa_gen_reloc_type;
+ elf_hppa_reloc_final_type = elf32_hppa_reloc_final_type;
+ hppa_arch_size = 32;
+ bfd_mach = bfd_mach_hppa10;
+ } else
+#endif
+ as_fatal ("Invalid default architecture, broken assembler.");
+
+ setup_reg_hash();
+}
+
+static void
+setup_reg_hash()
+{
+ /* Initialize reg_hash hash table */
+ reg_hash = hash_new ();
+
+ const struct pd_reg *reg_entry;
+
+ for (reg_entry = pre_defined_registers;
+ reg_entry < pre_defined_registers + REG_NAME_CNT;
+ reg_entry++)
+ {
+ if (reg_entry->mach > bfd_mach)
+ continue;
+
+ /* We intentionally don't check the return status here. Because
+ with one exception, the hppa64 and hppa32 sets are the same,
+ we make sure that we will see the hppa64 ops first if we're
+ willing to take them, and just fault on the second insert. */
+ hash_insert (reg_hash, reg_entry->name, (PTR) reg_entry);
+ }
+}
+
+void
+hppa_print_statistics (FILE *file)
+{
+ hash_print_statistics (file, "hppa opcode", op_hash);
+ hash_print_statistics (file, "hppa register", reg_hash);
+}
+
+/* Called by TARGET_FORMAT */
+const char *
+hppa_target_format ()
+{
+ /* We don't get a chance to initialize anything before we're called,
+ so handle that now. */
+
+ init_default_arch ();
+
+#ifdef OBJ_ELF
+ return hppa_arch_size == 64 ? ELF64_TARGET_FORMAT : ELF_TARGET_FORMAT;
+#endif
+
+#ifdef OBJ_SOM
+ return "som";
+#endif
+
+ abort ();
+}
+
+static void
pa_vtable_inherit (int ignore ATTRIBUTE_UNUSED)
{
struct fix *new_fix;
Index: config/tc-hppa.h
===================================================================
RCS file: /cvs/src/src/gas/config/tc-hppa.h,v
retrieving revision 1.31
diff -u -p -r1.31 tc-hppa.h
--- config/tc-hppa.h 24 May 2006 11:05:42 -0000 1.31
+++ config/tc-hppa.h 23 Oct 2006 03:11:34 -0000
@@ -46,32 +46,42 @@
#define WORKING_DOT_WORD
#ifdef OBJ_ELF
-#if TARGET_ARCH_SIZE == 64
-#include "bfd/elf64-hppa.h"
-#if defined (TE_LINUX) || defined (TE_NetBSD)
-#define TARGET_FORMAT "elf64-hppa-linux"
-#else
-#define TARGET_FORMAT "elf64-hppa"
-#endif
-#else /* TARGET_ARCH_SIZE == 32 */
-#include "bfd/elf32-hppa.h"
-#if defined (TE_LINUX)
-#define TARGET_FORMAT "elf32-hppa-linux"
-#else
-#if defined (TE_NetBSD)
-#define TARGET_FORMAT "elf32-hppa-netbsd"
-#else
-#define TARGET_FORMAT "elf32-hppa"
-#endif
-#endif
-#endif
-#endif
+/* Cannot make this runtime selectable until bfd is merged */
+# if TARGET_ARCH_SIZE == 64
+# include "bfd/elf64-hppa.h"
+# else
+# include "bfd/elf32-hppa.h"
+# endif
+
+# ifdef TE_LINUX
+# define ELF_TARGET_FORMAT "elf32-hppa-linux"
+# define ELF64_TARGET_FORMAT "elf64-hppa-linux"
+# endif
+
+# ifdef TE_NetBSD
+# define ELF_TARGET_FORMAT "elf32-hppa-netbsd"
+# endif
+
+# ifndef ELF_TARGET_FORMAT
+# define ELF_TARGET_FORMAT "elf32-hppa"
+# endif
+
+# ifndef ELF64_TARGET_FORMAT
+# define ELF64_TARGET_FORMAT "elf64-hppa"
+# endif
+
+#endif /* OBJ_ELF */
#ifdef OBJ_SOM
#include "bfd/som.h"
-#define TARGET_FORMAT "som"
#endif
+#define TARGET_FORMAT hppa_target_format()
+extern const char *hppa_target_format (void);
+
+void hppa_print_statistics (FILE *);
+#define tc_print_statistics hppa_print_statistics
+
#if defined(TE_LINUX) || defined(TE_NetBSD)
/* Define to compile in an extra assembler option, -c, which enables a
warning (once per file) when a comment is encountered.
@@ -81,12 +91,6 @@
#define WARN_COMMENTS 1
#endif
-/* FIXME. Why oh why aren't these defined somewhere globally? */
-#ifndef FALSE
-#define FALSE (0)
-#define TRUE (!FALSE)
-#endif
-
#define ASEC_NULL (asection *)0
/* pa_define_label gets used outside of tc-hppa.c via tc_frob_label. */
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