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From: Grant Grundler <grundler@cup.hp.com>
To: Alex deVries <adevries@thepuffingroup.com>
Cc: parisc-linux@thepuffingroup.com
Subject: Re: [parisc-linux] Dino and Lasi
Date: Mon, 28 Jun 1999 10:03:14 -0700	[thread overview]
Message-ID: <199906281703.KAA03194@milano.cup.hp.com> (raw)
In-Reply-To: Your message of "Mon, 28 Jun 1999 01:26:46 PDT." <37770796.C70E0C65@thepuffingroup.com>

Alex deVries wrote:
> 
> 
> Okay, I've committed some small changes to dino and lasi that can easily
> be backed out.
> 
> some questions:
> 
> - what IRQ are we going to run LASI on?  Is that something we just pick
> and hard code?

Isn't LASI a PA (ie GSC bus) device?
If so, it can use any EIRR bit/HPA pair supported by the PA processor code.
It needs to register an ISR with PA interrupt code and get the EIRR/HPA
pair (commonly called EIM value).

Same is true for Dino.

> - I changed lasi.c and dino.c to only use readl() and writel(), and not
> readb and writew, etc.  Was this a mistake?

For Dino, I think so. On a reads, it shouldn't matter unless the
reads have side effects (eg. clears the byte register). On writes
too many byte enables will be set.

BTW, I assume you are talking about PCI MMIO/Port/Cfg space accessor
functions.

> - We really really need the IRQ bottom halfs setup.  Any takers?

What do you mean "bottom half"?
dino_isr() to map DINO EIM registers to PCI IRQ lines (and thus
PCI device ISRs)?

grant

Grant Grundler
+1.408.447.7253

  reply	other threads:[~1999-06-28 17:04 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
1999-06-28  5:26 [parisc-linux] Dino and Lasi Alex deVries
1999-06-28 17:03 ` Grant Grundler [this message]
1999-06-28 17:56   ` Alan Cox

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