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Date: Wed, 30 Aug 2000 14:18:25 +0100
From: Matthew Wilcox <matthew@wil.cx>
To: Richard Hirst <rhirst@linuxcare.com>
Cc: Matthew Wilcox <matthew@wil.cx>, David Huggins-Daines <dhd@linuxcare.com>,
        parisc-linux@thepuffingroup.com
Subject: Re: [parisc-linux] 2.4.0-test6 lack of speed
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In-Reply-To: <20000830111523.F877@linuxcare.com>; from rhirst@linuxcare.com on Wed, Aug 30, 2000 at 11:15:23AM +0100
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On Wed, Aug 30, 2000 at 11:15:23AM +0100, Richard Hirst wrote:
> What do you make of arch/parisc/lib/usercopy.c
> 
> unsigned long
> __generic_copy_to_user(void *to, const void *from, unsigned long n)
> {
>         if (access_ok(VERIFY_WRITE, to, n)) {
>                 __flush_dcache_range((unsigned long)from, n);
>                 lcopy_to_user(to,from,n);
>                 __flush_dcache_range((unsigned long)to, n);
>         }
>         return 0;
> }
> 
> Typically 'from' would be a kernel virtual address, and 'to' would
> be a user virtual address, yes?  So, that is expecting __flush_dcache_range()
> to know which space register to use.  But then sometimes these functions
> for accessing user space are redirected at kernel space by set_fs().
> In that case both addresses are kernel virtual addresses.

Right.  But I don't see why we need to flush any caches at all here.
We're not changing any mappings, we're accessing through a fixed space
register, there's no other device involved, if there were another CPU
involved then it would be cache-coherent _anyway_ -- what's the problem?