[parisc-linux] Re: CCIO dma io_command and related io_tlb format questions.

[Grant Grundler <grundler@parisc-linux.org>]

On Thu, Oct 12, 2006 at 10:02:13AM +0200, Joel Soete wrote:
...
> well according to the choice of a PAGE_SIZE, a IOVP_SIZE and the actual system
> ramsize (imho badly named num_physpages?), you can setup the sba?

Is that a question or a statement?
PAGE_SIZE is a compile time option.
PA2.0 CPUs support sizes other than 4k.
And I think it was Helge that started on enabling bigger
page sizes but it's not working yet.

...
> (is it only the number of io tlb entries?)

Off hand, I'm not sure. It's probably related though.

> My thought was very basic: imho vitualising actual adresses pages would just
> be translation of adresses but the virtual page size should be the same as the
> actual one?

"actual one"?
We have RAM. The CPU TLB that organizes RAM into "pages" as the
minimum granularity that the kernel manages permissions and use of RAM.
The IO TLB doesn't have to use the same granularity as the kernel
though it's easier (and probably faster in general) to do so.


> (and btw the ccio bc using actual pages'size in accordance with computed
> chainid_shift (different then IOVP_SHIFT), ccio_[map, unmap]_single should
> also use chainid_shift to compute chainid_size and chainid_mask to manage sg
> list?)

Ah. chainid could have more to do with the number of TLB entries than
the size of the pages. I'm not certain though.

grant
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