[PATCH] parisc: Set valid bit in high byte of 64‑bit physical address

[Leon Romanovsky <leon@kernel.org>]

From: Leon Romanovsky <leonro@nvidia.com>

On 32‑bit systems, phys_addr_t is defined as u32. However, parisc
expects physical addresses to be 64‑bit values so it can store a
validity bit in the upper byte.

Resolve this mismatch by casting the physical address to unsigned
long, ensuring it is treated as a 64‑bit value where required. This
fixes the failure to start block device drivers on the C3700
platform, as reported by Guenter.

Also remove the now‑obsolete macro.

QEMU command line to reproduce the issue (with Debian SID as rootfs):
  qemu-system-hppa -machine C3700 \
	-kernel arch/parisc/boot/bzImage \
	-append "console=ttyS0 \
	root=/dev/sda rw rootwait panic=-1" \
	-nographic \
	-device lsi53c895a \
	-drive file=rootfs-hppa.img,if=none,format=raw,id=hd0 \
	-device scsi-hd,drive=hd0

Fixes: 96ddf2ef58ec ("parisc: Convert DMA map_page to map_phys interface")
Reported-by: Guenter Roeck <linux@roeck-us.net>
Closes: https://lore.kernel.org/all/b184f1bf-96dc-4546-8512-9cba5ecb58f7@roeck-us.net/
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
---
 arch/parisc/include/asm/special_insns.h | 15 ---------------
 drivers/parisc/sba_iommu.c              |  4 ++--
 2 files changed, 2 insertions(+), 17 deletions(-)

diff --git a/arch/parisc/include/asm/special_insns.h b/arch/parisc/include/asm/special_insns.h
index 1013eeba31e5..fbccd76180b6 100644
--- a/arch/parisc/include/asm/special_insns.h
+++ b/arch/parisc/include/asm/special_insns.h
@@ -2,21 +2,6 @@
 #ifndef __PARISC_SPECIAL_INSNS_H
 #define __PARISC_SPECIAL_INSNS_H
 
-#define lpa(va)	({					\
-	unsigned long pa;				\
-	__asm__ __volatile__(				\
-		"copy %%r0,%0\n"			\
-		"8:\tlpa %%r0(%1),%0\n"			\
-		"9:\n"					\
-		ASM_EXCEPTIONTABLE_ENTRY(8b, 9b,	\
-				"or %%r0,%%r0,%%r0")	\
-		: "=&r" (pa)				\
-		: "r" (va)				\
-		: "memory"				\
-	);						\
-	pa;						\
-})
-
 #define lpa_user(va)	({				\
 	unsigned long pa;				\
 	__asm__ __volatile__(				\
diff --git a/drivers/parisc/sba_iommu.c b/drivers/parisc/sba_iommu.c
index a6eb6bffa5ea..eefb2bac8443 100644
--- a/drivers/parisc/sba_iommu.c
+++ b/drivers/parisc/sba_iommu.c
@@ -578,8 +578,8 @@ sba_io_pdir_entry(__le64 *pdir_ptr, space_t sid, phys_addr_t pba,
 	pba &= IOVP_MASK;
 	pba |= (ci >> PAGE_SHIFT) & 0xff;  /* move CI (8 bits) into lowest byte */
 
-	pba |= SBA_PDIR_VALID_BIT;	/* set "valid" bit */
-	*pdir_ptr = cpu_to_le64(pba);	/* swap and store into I/O Pdir */
+	/* set "valid" bit, swap and store into I/O Pdir */
+	*pdir_ptr = cpu_to_le64((unsigned long)pba | SBA_PDIR_VALID_BIT);
 
 	/*
 	 * If the PDC_MODEL capabilities has Non-coherent IO-PDIR bit set

---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20251218-fix-parisc-conversion-37e31197a291

Best regards,
--  
Leon Romanovsky <leonro@nvidia.com>