* [PATCH] parisc: Fix cacheflush() syscall to flush correct cache
@ 2026-03-09 14:41 Helge Deller
2026-03-09 15:32 ` John David Anglin
0 siblings, 1 reply; 2+ messages in thread
From: Helge Deller @ 2026-03-09 14:41 UTC (permalink / raw)
To: linux-parisc; +Cc: Helge Deller, Felix Lechner
From: Helge Deller <deller@gmx.de>
Somehow the assembly flush instruction was swapped for I- and D-cache flags
in the cacheflush() syscall:
SYSCALL_DEFINE3(cacheflush, ...)
{
if (cache & DCACHE) {
"fic ...\n"
}
if (cache & ICACHE && error == 0) {
"fdc ...\n"
}
Fix it by using fdc for DCACHE, and fic for ICACHE flushing.
Noticed-by: Felix Lechner <felix.lechner@lease-up.com>
Fixes: c6d96328fecd ("parisc: Add cacheflush() syscall")
Signed-off-by: Helge Deller <deller@gmx.de>
---
arch/parisc/kernel/cache.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
index 4c5240d3a3c7..b189265785dc 100644
--- a/arch/parisc/kernel/cache.c
+++ b/arch/parisc/kernel/cache.c
@@ -953,7 +953,7 @@ SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes,
#else
"1: cmpb,<<,n %0,%2,1b\n"
#endif
- " fic,m %3(%4,%0)\n"
+ " fdc,m %3(%4,%0)\n"
"2: sync\n"
ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 2b, "%1")
: "+r" (start), "+r" (error)
@@ -968,7 +968,7 @@ SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes,
#else
"1: cmpb,<<,n %0,%2,1b\n"
#endif
- " fdc,m %3(%4,%0)\n"
+ " fic,m %3(%4,%0)\n"
"2: sync\n"
ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 2b, "%1")
: "+r" (start), "+r" (error)
--
2.53.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] parisc: Fix cacheflush() syscall to flush correct cache
2026-03-09 14:41 [PATCH] parisc: Fix cacheflush() syscall to flush correct cache Helge Deller
@ 2026-03-09 15:32 ` John David Anglin
0 siblings, 0 replies; 2+ messages in thread
From: John David Anglin @ 2026-03-09 15:32 UTC (permalink / raw)
To: Helge Deller, linux-parisc; +Cc: Helge Deller, Felix Lechner
When generating generating PA 1.x compatible code, the fic instruction needs a 3-bit
s field (i.e., implicit space register selection isn't supported).
Dave
On 2026-03-09 10:41 a.m., Helge Deller wrote:
> From: Helge Deller <deller@gmx.de>
>
> Somehow the assembly flush instruction was swapped for I- and D-cache flags
> in the cacheflush() syscall:
> SYSCALL_DEFINE3(cacheflush, ...)
> {
> if (cache & DCACHE) {
> "fic ...\n"
> }
> if (cache & ICACHE && error == 0) {
> "fdc ...\n"
> }
>
> Fix it by using fdc for DCACHE, and fic for ICACHE flushing.
>
> Noticed-by: Felix Lechner <felix.lechner@lease-up.com>
> Fixes: c6d96328fecd ("parisc: Add cacheflush() syscall")
> Signed-off-by: Helge Deller <deller@gmx.de>
> ---
> arch/parisc/kernel/cache.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
> index 4c5240d3a3c7..b189265785dc 100644
> --- a/arch/parisc/kernel/cache.c
> +++ b/arch/parisc/kernel/cache.c
> @@ -953,7 +953,7 @@ SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes,
> #else
> "1: cmpb,<<,n %0,%2,1b\n"
> #endif
> - " fic,m %3(%4,%0)\n"
> + " fdc,m %3(%4,%0)\n"
> "2: sync\n"
> ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 2b, "%1")
> : "+r" (start), "+r" (error)
> @@ -968,7 +968,7 @@ SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes,
> #else
> "1: cmpb,<<,n %0,%2,1b\n"
> #endif
> - " fdc,m %3(%4,%0)\n"
> + " fic,m %3(%4,%0)\n"
> "2: sync\n"
> ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 2b, "%1")
> : "+r" (start), "+r" (error)
--
John David Anglin dave.anglin@bell.net
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