From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 485C8C77B76 for ; Thu, 20 Apr 2023 14:52:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232927AbjDTOwS (ORCPT ); Thu, 20 Apr 2023 10:52:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44410 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230386AbjDTOwN (ORCPT ); Thu, 20 Apr 2023 10:52:13 -0400 Received: from mail-pg1-x549.google.com (mail-pg1-x549.google.com [IPv6:2607:f8b0:4864:20::549]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2E8049FA for ; Thu, 20 Apr 2023 07:51:51 -0700 (PDT) Received: by mail-pg1-x549.google.com with SMTP id 41be03b00d2f7-52057b3d776so638598a12.2 for ; Thu, 20 Apr 2023 07:51:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1682002311; x=1684594311; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=cenhvMgRBJVEyO+DQ1Yk7EeAnoD+Mx3QDGrPvs6dp/U=; b=ozdQf66WPw8ShRBluz+LMQljss+d3T0PBYjA3jmNDdv//pVrmGXx6L9uusb7fIhJSL LymgWp9X3FbkLAAxceftLeQZn0/6M8JdZmIbsV9oONQVhJAe+e9OODUteXA7bMLvWkmz 5ayRkEY6NENxUYGlnGZFkZBlmyRHMXNIOgoLHCbFX3aaDwjuintlWNx5LkJKfs2Sd6PE Ya8JLH6D3Xz61J6mffVksjDGSWXvO9yhMWIRSY/rzCnaTg7svns1MKliwXodcMA+7eb1 u30LO7+8+pIMTa1eXTgGdK8wfjlZ/7y7DufflgYGy0ae6b3znNofgHpeyL7dnXNOKs4z yrGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682002311; x=1684594311; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=cenhvMgRBJVEyO+DQ1Yk7EeAnoD+Mx3QDGrPvs6dp/U=; b=Dobdhasd1+NzOM0fNWb3Vo0pBB8shaf2PL9ia2CXnsbqCuDCfyKRqsIkrnAdb9LiAt a5W8KO3mmTRwq3BTWnC/yQUVzR4lgFJDm0+3s6eQlVu780hy19kSP9mpEdb89742Kdal lnt78MWGtxU5RoQxvu+evCN7wem47VODUNnGqXEY9F/ImviFKFXRpnFu1oOyGkLWQgOU 2sAlHpylwxm1j6eMyKYiu+RHkcAbX1CBolgFbc9RmCgrxpY7sn+PlRaOMabUkoAeLPXz tqtW1UZuy9wL+HY7QBRzgqF0j6wjTOWj1By+gZyn2P2hIEwx5JzzfAE0nPHGS3cJJ+nq lPPw== X-Gm-Message-State: AAQBX9dXXLLJB9L1WMRl/yqBuVe6erbo58YajLMZuSDTnLArIL4nAVym S3nklKc8Du2wk2YOd2C8pfmDkx2uBvE= X-Google-Smtp-Source: AKy350YZDYx9Ka0U+LJTenQgM1KG3UW2Yutu07LdZ7q6GZTzBdJRqMrlgBJSIie+uzUyI4FO9iSrYEblhR4= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:902:f807:b0:1a6:3a2e:b731 with SMTP id ix7-20020a170902f80700b001a63a2eb731mr623230plb.1.1682002311424; Thu, 20 Apr 2023 07:51:51 -0700 (PDT) Date: Thu, 20 Apr 2023 07:51:49 -0700 In-Reply-To: <87y1mm3iqz.ffs@tglx> Mime-Version: 1.0 References: <87r0sh4m7a.ffs@tglx> <8592a301-9933-1cad-bd61-8d97e7c7493b@molgen.mpg.de> <87a5z443g2.ffs@tglx> <877cu83v45.ffs@tglx> <874jpc3s3r.ffs@tglx> <0f5463fd-9c4a-6361-adbb-dd89dbb9138d@citrix.com> <871qkf3qek.ffs@tglx> <26d385da-2ede-5d73-2959-84c8f7d89e03@citrix.com> <87y1mm3iqz.ffs@tglx> Message-ID: Subject: Re: [patch 00/37] cpu/hotplug, x86: Reworked parallel CPU bringup From: Sean Christopherson To: Thomas Gleixner Cc: Andrew Cooper , Paul Menzel , linux-kernel@vger.kernel.org, x86@kernel.org, David Woodhouse , Brian Gerst , Arjan van de Veen , Paolo Bonzini , Paul McKenney , Tom Lendacky , Oleksandr Natalenko , "Guilherme G. Piccoli" , Piotr Gorski , David Woodhouse , Usama Arif , "=?iso-8859-1?Q?J=FCrgen_Gro=DF?=" , Boris Ostrovsky , xen-devel@lists.xenproject.org, Russell King , Arnd Bergmann , linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Guo Ren , linux-csky@vger.kernel.org, Thomas Bogendoerfer , linux-mips@vger.kernel.org, "James E. J. Bottomley" , Helge Deller , linux-parisc@vger.kernel.org, Paul Walmsley , Palmer Dabbelt , linux-riscv@lists.infradead.org, Mark Rutland , Sabin Rapan Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: linux-parisc@vger.kernel.org On Thu, Apr 20, 2023, Thomas Gleixner wrote: > On Thu, Apr 20 2023 at 10:23, Andrew Cooper wrote: > > On 20/04/2023 9:32 am, Thomas Gleixner wrote: > > > On Wed, Apr 19, 2023, Andrew Cooper wrote: > > > > This was changed in x2APIC, which made the x2APIC_ID immutable. > > >> I'm pondering to simply deny parallel mode if x2APIC is not there. > > > > I'm not sure if that will help much. > > Spoilsport. LOL, well let me pile on then. x2APIC IDs aren't immutable on AMD hardware. The ID is read-only when the CPU is in x2APIC mode, but any changes made to the ID while the CPU is in xAPIC mode survive the transition to x2APIC. From the APM: A value previously written by software to the 8-bit APIC_ID register (MMIO offset 30h) is converted by hardware into the appropriate format and reflected into the 32-bit x2APIC_ID register (MSR 802h). FWIW, my observations from testing on bare metal are that the xAPIC ID is effectively read-only (writes are dropped) on Intel CPUs as far back as Haswell, while the above behavior described in the APM holds true on at least Rome and Milan. My guess is that Intel's uArch specific behavior of the xAPIC ID being read-only was introduced when x2APIC came along, but I didn't test farther back than Haswell.