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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?000sw2O9eSD1cN+kq2iM/n7liJDlfvgwU8xRN65g3HWdy9c6584E9PTCpdev?= =?us-ascii?Q?Pmw+FBePLd5UXcSE7ZqcRRGuquNleHz/sbA0DpuDe8GiVGMhwBtG7oSP1AV7?= =?us-ascii?Q?DtM3Bmy/aFRckcs5WDzYtcCCmmmPQIILKZn78XxU1W/OWv5XEkZYSYpqxOqL?= =?us-ascii?Q?I2DOBES//0VXxMSLGN+OxWCv0FkKyi5wJB93O/3J554tJzkPGywOnTAFKz75?= =?us-ascii?Q?OVXXZfcPemt7ctpUouq1JeyQJpyZ8C/PpqChHo2Myhj459BIF5tSVv8SFFur?= =?us-ascii?Q?28gUg5AnxRbxX9evKkjo9sZ21TnN9HHSdAMEOAs5s2D56XxKRrBQ5sn6x9ho?= =?us-ascii?Q?XoRMUo4Ob2VO9Ojvzm0qGGkwwOU4HTayuVhAsJKNloMBaoSXHY1it4s4LlHV?= =?us-ascii?Q?vEXLb9H+Hp1vbbpK4zT6MtueEAwNg+K5rEJsGqkVmpIYDua2giV/KovFWijs?= =?us-ascii?Q?AeBBq4imw4nQpv4iugR7yH95i8cGsWEF4+h5pzNAyqt4aLKqPUdgCpx975fx?= =?us-ascii?Q?+Hng1+imxnRlMRtxXUp+MKBBv8o8pvGohDV2J5JSyzHrPI21ycPFuDcSf0ZN?= =?us-ascii?Q?k5wY2uhC5acweuFnjQjUdPqFRYXJDi+QxwLCtSklDCMCQQnTS6qkNrqb6yxN?= =?us-ascii?Q?qImyrzkf2JhPD9dBZaIaJJWznm2fNCER3hdxBwX+KbgUZTWDi78QL7+Yka01?= =?us-ascii?Q?v0idTKXImPdQdm+XSSWCP24WrW7ePlNCx34mUgQVyZ5jYJ30KnNu9+asUVPb?= =?us-ascii?Q?ATNlD+CNoFftRE1ogY/otOAwfG4ElCmcwJlrZdFdUdorg9AheXPbecXylrt+?= =?us-ascii?Q?TJx7c89/zLcMtI6ObFaBOriAymGscIYXUn3mB5j9webbXnyIf20pvX0c4DMB?= =?us-ascii?Q?OnSVRnQku89FdGETagXV/YWg8kjFfaQA+xN13S9sHXSDFtzscWmHmzPmsuaS?= =?us-ascii?Q?1P+Smolm50lH+MY+2vmfg5lqD4FA5rCu6EQAaJJOdF6XPZZDqVVneNpga1d3?= =?us-ascii?Q?WG51JrLbvIUESu9ZSu42RYfyuiKziFJ37kGvKuGW9CgbKdSConDFe1cRovYj?= =?us-ascii?Q?OTMqb1PF0luomZI/eLF9dXcxghVpX3iXStT7BCS9l0fh6PYiH25BVZenBw54?= =?us-ascii?Q?zXuihGmG7mBoaqGBq8b+wZst1/SuB/tV/YyHGoypbbrvfE2Tm2sWtQJ2YhNO?= =?us-ascii?Q?EoJYjtnrhXGlx+htlzflCO9/kEcB02+u+R8GZaln+Ifq18fWwbBVYFIQp5/D?= =?us-ascii?Q?AaLBzQFRkb4xsdFpo5UL2Goy7lJGeA4RC6wGZ/NBRlHSoA2zgs0Tx82+oB9C?= =?us-ascii?Q?Fgo1EBTZohpy4YVUEN+cqSH7M2UtKVCDpqWr0uMXdowEIGTBW1IgXORXpisH?= =?us-ascii?Q?p3QKZo2QBCNBsfesJJQbZby9Ps9OHyM2vbJXMItoYKfbE2JknCJKLH19aGA9?= =?us-ascii?Q?OHI8An4rlf5N1BBNgNWdQ5vUrddr0JTDHnjHZt5nJ7ey0KcREYJLxLaKyX0O?= =?us-ascii?Q?/xZcNJoON9Cui4zBGhm1rmDyZGZW3lYbtu6BGVEjUiD5pXltLp4crO6LwfNW?= =?us-ascii?Q?YtU/yOUB6KK2dQ7/jaQtzLhNbYPY/4sfKk84KkZL?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 05609441-9ce1-4bd1-3a02-08dc1e016405 X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Jan 2024 23:57:30.2676 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ShBlJCOuS8XOMndYTcONxdoCTKneUEvtMMwQ1DWkNNmtMXn3ovuzB+9oB06bd9oy X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7881 Introducing global statics which are of type struct iommu_domain, not struct arm_smmu_domain makes it difficult to retain arm_smmu_master->domain, as it can no longer point to an IDENTITY or BLOCKED domain. The only place that uses the value is arm_smmu_detach_dev(). Change things to work like other drivers and call iommu_get_domain_for_dev() to obtain the current domain. The master->domain is subtly protecting the domain_head against being unused, change the domain_head to be INIT'd when the master is not attached to a domain instead of garbage/zero. Tested-by: Shameer Kolothum Tested-by: Nicolin Chen Tested-by: Moritz Fischer Reviewed-by: Nicolin Chen Signed-off-by: Jason Gunthorpe --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 26 ++++++++------------- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 - 2 files changed, 10 insertions(+), 17 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index d7b0cea140f12b..f08cfa9b90b3eb 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2533,19 +2533,20 @@ static void arm_smmu_disable_pasid(struct arm_smmu_master *master) static void arm_smmu_detach_dev(struct arm_smmu_master *master) { + struct iommu_domain *domain = iommu_get_domain_for_dev(master->dev); + struct arm_smmu_domain *smmu_domain; unsigned long flags; - struct arm_smmu_domain *smmu_domain = master->domain; - if (!smmu_domain) + if (!domain) return; + smmu_domain = to_smmu_domain(domain); arm_smmu_disable_ats(master, smmu_domain); spin_lock_irqsave(&smmu_domain->devices_lock, flags); - list_del(&master->domain_head); + list_del_init(&master->domain_head); spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); - master->domain = NULL; master->ats_enabled = false; } @@ -2599,8 +2600,6 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) arm_smmu_detach_dev(master); - master->domain = smmu_domain; - /* * The SMMU does not support enabling ATS with bypass. When the STE is * in bypass (STE.Config[2:0] == 0b100), ATS Translation Requests and @@ -2619,10 +2618,8 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) case ARM_SMMU_DOMAIN_S1: if (!master->cd_table.cdtab) { ret = arm_smmu_alloc_cd_tables(master); - if (ret) { - master->domain = NULL; + if (ret) goto out_list_del; - } } else { /* * arm_smmu_write_ctx_desc() relies on the entry being @@ -2630,17 +2627,13 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) */ ret = arm_smmu_write_ctx_desc(master, IOMMU_NO_PASID, NULL); - if (ret) { - master->domain = NULL; + if (ret) goto out_list_del; - } } ret = arm_smmu_write_ctx_desc(master, IOMMU_NO_PASID, &smmu_domain->cd); - if (ret) { - master->domain = NULL; + if (ret) goto out_list_del; - } arm_smmu_make_cdtable_ste(&target, master, &master->cd_table); arm_smmu_install_ste_for_dev(master, &target); @@ -2666,7 +2659,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) out_list_del: spin_lock_irqsave(&smmu_domain->devices_lock, flags); - list_del(&master->domain_head); + list_del_init(&master->domain_head); spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); out_unlock: @@ -2867,6 +2860,7 @@ static struct iommu_device *arm_smmu_probe_device(struct device *dev) master->dev = dev; master->smmu = smmu; INIT_LIST_HEAD(&master->bonds); + INIT_LIST_HEAD(&master->domain_head); dev_iommu_priv_set(dev, master); ret = arm_smmu_insert_master(smmu, master); diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index eb669121f1954d..6b63ea7dae72da 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -695,7 +695,6 @@ struct arm_smmu_stream { struct arm_smmu_master { struct arm_smmu_device *smmu; struct device *dev; - struct arm_smmu_domain *domain; struct list_head domain_head; struct arm_smmu_stream *streams; /* Locked by the iommu core using the group mutex */ -- 2.43.0