From: ALOK TIWARI <alok.a.tiwari@oracle.com>
To: Jason Gunthorpe <jgg@nvidia.com>,
Jonathan Corbet <corbet@lwn.net>,
iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
Justin Stitt <justinstitt@google.com>,
Kevin Tian <kevin.tian@intel.com>,
linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org,
llvm@lists.linux.dev, Bill Wendling <morbo@google.com>,
Nathan Chancellor <nathan@kernel.org>,
Nick Desaulniers <nick.desaulniers+lkml@gmail.com>,
Miguel Ojeda <ojeda@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Shuah Khan <shuah@kernel.org>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
Will Deacon <will@kernel.org>
Cc: Alexey Kardashevskiy <aik@amd.com>,
Alejandro Jimenez <alejandro.j.jimenez@oracle.com>,
James Gowans <jgowans@amazon.com>,
Michael Roth <michael.roth@amd.com>,
Pasha Tatashin <pasha.tatashin@soleen.com>,
patches@lists.linux.dev
Subject: Re: [External] : [PATCH v5 01/15] genpt: Generic Page Table base API
Date: Mon, 22 Sep 2025 20:15:45 +0530 [thread overview]
Message-ID: <11743f88-7cc0-416f-acb5-807c9b9aa1db@oracle.com> (raw)
In-Reply-To: <1-v5-116c4948af3d+68091-iommu_pt_jgg@nvidia.com>
> diff --git a/drivers/iommu/generic_pt/pt_fmt_defaults.h b/drivers/iommu/generic_pt/pt_fmt_defaults.h
> new file mode 100644
> index 00000000000000..19e8f820c1dccf
> --- /dev/null
> +++ b/drivers/iommu/generic_pt/pt_fmt_defaults.h
> @@ -0,0 +1,193 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (c) 2024-2025, NVIDIA CORPORATION & AFFILIATES
> + *
> + * Default definitions for formats that don't define these functions.
> + */
> +#ifndef __GENERIC_PT_PT_FMT_DEFAULTS_H
> +#define __GENERIC_PT_PT_FMT_DEFAULTS_H
> +
> +#include "pt_defs.h"
> +#include <linux/log2.h>
> +
> +/* Header self-compile default defines */
> +#ifndef pt_load_entry_raw
> +#include "fmt/amdv1.h"
> +#endif
> +
> +/*
> + * The format must provide PT_GRANULE_LG2SZ, PT_TABLEMEM_LG2SZ, and
> + * PT_ITEM_WORD_SIZE. They must be the same at every level excluding the top.
> + */
> +#ifndef pt_table_item_lg2sz
> +static inline unsigned int pt_table_item_lg2sz(const struct pt_state *pts)
> +{
> + return PT_GRANULE_LG2SZ +
> + (PT_TABLEMEM_LG2SZ - ilog2(PT_ITEM_WORD_SIZE)) * pts->level;
> +}
> +#endif
> +
> +#ifndef pt_pgsz_lg2_to_level
> +static inline unsigned int pt_pgsz_lg2_to_level(struct pt_common *common,
> + unsigned int pgsize_lg2)
> +{
> + return (pgsize_lg2 - PT_GRANULE_LG2SZ) /
> + (PT_TABLEMEM_LG2SZ - ilog2(PT_ITEM_WORD_SIZE));
> + return 0;
this return is dead code.
> +}
> +#endif
> +
[snip]
> +/**
> + * pt_compute_best_pgsize() - Determine the best page size for leaf entries
> + * @pgsz_bitmap: Permitted page sizes
> + * @va: Starting virtual address for the leaf entry
> + * @last_va: Last virtual address for the leaf entry, sets the max page size
> + * @oa: Starting output address for the leaf entry
> + *
> + * Compute the largest page size for va, last_va, and oa together and return it
> + * in lg2. The largest page size depends on the format's supported page sizes at
> + * this level, and the relative alignment of the VA and OA addresses. 0 means
> + * the OA cannot be stored with the provided pgsz_bitmap.
> + */
> +static inline unsigned int pt_compute_best_pgsize(pt_vaddr_t pgsz_bitmap,
> + pt_vaddr_t va,
> + pt_vaddr_t last_va,
> + pt_oaddr_t oa)
> +{
> + unsigned int best_pgsz_lg2;
> + unsigned int pgsz_lg2;
> + pt_vaddr_t len = last_va - va + 1;
> + pt_vaddr_t mask;
> +
> + if (PT_WARN_ON(va >= last_va))
> + return 0;
> +
> + /*
> + * Given a VA/OA pair the best page size is the largest page side
largest page side or largest page size
> + * where:
> + *
> + * 1) VA and OA start at the page. Bitwise this is the count of least
> + * significant 0 bits.
> + * This also implies that last_va/oa has the same prefix as va/oa.
> + */
> + mask = va | oa;
> +
> + /*
> + * 2) The page size is not larger than the last_va (length). Since page
> + * sizes are always power of two this can't be larger than the
> + * largest power of two factor of the length.
> + */
> + mask |= log2_to_int(log2_fls(len) - 1);
> +
> + best_pgsz_lg2 = log2_ffs(mask);
> +
> + /* Choose the higest bit <= best_pgsz_lg2 */
higest -> highest
> + if (best_pgsz_lg2 < PT_VADDR_MAX_LG2 - 1)
> + pgsz_bitmap = log2_mod(pgsz_bitmap, best_pgsz_lg2 + 1);
> +
> + pgsz_lg2 = log2_fls(pgsz_bitmap);
> + if (!pgsz_lg2)
> + return 0;
> +
> + pgsz_lg2--;
> +
> + PT_WARN_ON(log2_mod(va, pgsz_lg2) != 0);
> + PT_WARN_ON(oalog2_mod(oa, pgsz_lg2) != 0);
> + PT_WARN_ON(va + log2_to_int(pgsz_lg2) - 1 > last_va);
> + PT_WARN_ON(!log2_div_eq(va, va + log2_to_int(pgsz_lg2) - 1, pgsz_lg2));
> + PT_WARN_ON(
> + !oalog2_div_eq(oa, oa + log2_to_int(pgsz_lg2) - 1, pgsz_lg2));
> + return pgsz_lg2;
> +}
Thanks,
Alok
next prev parent reply other threads:[~2025-09-22 14:46 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-03 17:46 [PATCH v5 00/15] Consolidate iommu page table implementations (AMD) Jason Gunthorpe
2025-09-03 17:46 ` [PATCH v5 01/15] genpt: Generic Page Table base API Jason Gunthorpe
2025-09-10 3:40 ` Nicolin Chen
2025-09-15 15:51 ` Jason Gunthorpe
2025-09-18 7:14 ` Nicolin Chen
2025-09-18 14:49 ` Jason Gunthorpe
2025-09-18 19:43 ` Nicolin Chen
2025-09-18 6:49 ` Tian, Kevin
2025-09-18 18:06 ` Jason Gunthorpe
2025-09-19 8:11 ` Tian, Kevin
2025-09-19 14:31 ` Jason Gunthorpe
2025-09-24 9:20 ` Tian, Kevin
2025-09-22 14:45 ` ALOK TIWARI [this message]
2025-09-22 17:05 ` [External] : " Jason Gunthorpe
2025-09-03 17:46 ` [PATCH v5 02/15] genpt: Add Documentation/ files Jason Gunthorpe
2025-09-11 4:23 ` Nicolin Chen
2025-09-15 15:42 ` Jason Gunthorpe
2025-09-18 6:55 ` Tian, Kevin
2025-09-19 14:42 ` Jason Gunthorpe
2025-09-24 9:21 ` Tian, Kevin
2025-09-03 17:46 ` [PATCH v5 03/15] iommupt: Add the basic structure of the iommu implementation Jason Gunthorpe
2025-09-11 5:38 ` Nicolin Chen
2025-09-15 15:36 ` Jason Gunthorpe
2025-09-18 6:58 ` Tian, Kevin
2025-09-19 15:26 ` Jason Gunthorpe
2025-09-24 9:22 ` Tian, Kevin
2025-09-03 17:46 ` [PATCH v5 04/15] iommupt: Add the AMD IOMMU v1 page table format Jason Gunthorpe
2025-09-18 7:05 ` Tian, Kevin
2025-09-19 18:19 ` Jason Gunthorpe
2025-09-24 9:23 ` Tian, Kevin
2025-10-07 12:28 ` Jason Gunthorpe
2025-10-08 9:43 ` Vasant Hegde
2025-10-08 13:08 ` Jason Gunthorpe
2025-10-09 11:44 ` Vasant Hegde
2025-09-03 17:46 ` [PATCH v5 05/15] iommupt: Add iova_to_phys op Jason Gunthorpe
2025-09-18 7:08 ` Tian, Kevin
2025-09-19 18:35 ` Jason Gunthorpe
2025-09-03 17:46 ` [PATCH v5 06/15] iommupt: Add unmap_pages op Jason Gunthorpe
2025-09-24 9:28 ` Tian, Kevin
2025-09-24 12:23 ` Jason Gunthorpe
2025-09-26 7:23 ` Tian, Kevin
2025-09-03 17:46 ` [PATCH v5 07/15] iommupt: Add map_pages op Jason Gunthorpe
2025-09-26 7:47 ` Tian, Kevin
2025-09-29 16:44 ` Jason Gunthorpe
2025-10-07 12:08 ` Vasant Hegde
2025-10-07 13:11 ` Jason Gunthorpe
2025-10-08 9:52 ` Vasant Hegde
2025-09-03 17:46 ` [PATCH v5 08/15] iommupt: Add read_and_clear_dirty op Jason Gunthorpe
2025-09-26 7:48 ` Tian, Kevin
2025-09-03 17:46 ` [PATCH v5 09/15] iommupt: Add a kunit test for Generic Page Table Jason Gunthorpe
2025-09-03 17:46 ` [PATCH v5 10/15] iommupt: Add a mock pagetable format for iommufd selftest to use Jason Gunthorpe
2025-09-26 7:50 ` Tian, Kevin
2025-09-03 17:46 ` [PATCH v5 11/15] iommufd: Change the selftest to use iommupt instead of xarray Jason Gunthorpe
2025-09-03 17:46 ` [PATCH v5 12/15] iommupt: Add the x86 64 bit page table format Jason Gunthorpe
2025-09-26 7:57 ` Tian, Kevin
2025-09-29 16:17 ` Jason Gunthorpe
2025-10-08 10:05 ` Vasant Hegde
2025-10-08 13:03 ` Jason Gunthorpe
2025-10-09 11:43 ` Vasant Hegde
2025-09-03 17:46 ` [PATCH v5 13/15] iommu/amd: Use the generic iommu page table Jason Gunthorpe
2025-09-25 12:07 ` Ankit Soni
2025-09-25 12:32 ` Jason Gunthorpe
2025-09-25 12:39 ` Ankit Soni
2025-10-08 9:47 ` Vasant Hegde
2025-09-03 17:46 ` [PATCH v5 14/15] iommu/amd: Remove AMD io_pgtable support Jason Gunthorpe
2025-09-03 17:46 ` [PATCH v5 15/15] iommupt: Add a kunit test for the IOMMU implementation Jason Gunthorpe
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