From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pg1-f176.google.com (mail-pg1-f176.google.com [209.85.215.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B72F14C84 for ; Fri, 17 Jun 2022 20:47:53 +0000 (UTC) Received: by mail-pg1-f176.google.com with SMTP id 184so4957272pga.12 for ; Fri, 17 Jun 2022 13:47:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ByN+wCXaOxi271nnEIZ20wtThFUPoDse0EkNhfr7LCE=; b=eIwcGaOBfUoWV4QGJeTDfvsmyotQRYQB6zsaQIRyV1maGpuVoPAlQB3RThmxv4Hos8 jj4yc7Rufi0MaAymjjwUWqflreOIgzvMyGYd/Z4cQTmiokLd6qUkFa0MYo1Y1nee+b/g sf5w340ndmzZ6mbvxm9sfKgndB7bSzaASL6vI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ByN+wCXaOxi271nnEIZ20wtThFUPoDse0EkNhfr7LCE=; b=tHC0P2ZSNW8q25bXzFs5QRY+q850K/O0Id85RxRXGMWpW8mcDBUfeORxmPdut/LxFY JoPAjyJP6UntcZtwjikkQHZuPaQ8OUctcEXlxGxzNgA1nrP1djKi0rmII6b8+ZWQeFxO OKeEnihffD4CLispCqa4gxEncqcizeNYukQhMES8S5O2GQcRM+GdhijnHwOQsexyHCaf vYAma4ZbIbePKJNE371ARKm+ZQrD84sutrpBAvFGVgno7iHoigioZGKowgKkQ3HTk3/D qqAF3TxzzOEvpG3uplE6taBYQSLdlktxQnR3/NgjPpdv3T1pBreWJVhQNaaZ2C1u2eWP rMyA== X-Gm-Message-State: AJIora+2PjdaB1jGQlv3gZgYUn6fs2apa1CiTmropDsHikIU8YaiC7Ud 4jYQNT8v/Cs1NV7fgcUB9xBYtA== X-Google-Smtp-Source: AGRyM1slGiViNrdzjVzcJOZuNc8QQfUtUDCVS+hnpTK9qGAD4qXmlvfW7+GU2rKzC3z/BPQ12WJFmQ== X-Received: by 2002:a63:140e:0:b0:408:a923:1a81 with SMTP id u14-20020a63140e000000b00408a9231a81mr10419194pgl.358.1655498873182; Fri, 17 Jun 2022 13:47:53 -0700 (PDT) Received: from smtp.gmail.com ([2620:15c:202:201:52e2:7dc8:1e20:f870]) by smtp.gmail.com with ESMTPSA id z12-20020aa79f8c000000b0052089e1b88esm4098325pfr.192.2022.06.17.13.47.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jun 2022 13:47:52 -0700 (PDT) From: Stephen Boyd To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov Cc: linux-kernel@vger.kernel.org, patches@lists.linux.dev, Sean Paul , dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Kuogee Hsieh Subject: [PATCH 1/3] drm/msm/dp: Reorganize code to avoid forward declaration Date: Fri, 17 Jun 2022 13:47:48 -0700 Message-Id: <20220617204750.2347797-2-swboyd@chromium.org> X-Mailer: git-send-email 2.36.1.476.g0c4daa206d-goog In-Reply-To: <20220617204750.2347797-1-swboyd@chromium.org> References: <20220617204750.2347797-1-swboyd@chromium.org> Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Let's move these functions around to avoid having to forward declare dp_ctrl_on_stream_phy_test_report(). Also remove dp_ctrl_reinitialize_mainlink() forward declaration because we're doing that sort of task. Cc: Kuogee Hsieh Signed-off-by: Stephen Boyd --- drivers/gpu/drm/msm/dp/dp_ctrl.c | 104 +++++++++++++++---------------- 1 file changed, 50 insertions(+), 54 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index 703249384e7c..bd445e683cfc 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -1238,8 +1238,6 @@ static int dp_ctrl_link_train_2(struct dp_ctrl_private *ctrl, return -ETIMEDOUT; } -static int dp_ctrl_reinitialize_mainlink(struct dp_ctrl_private *ctrl); - static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl, int *training_step) { @@ -1534,38 +1532,6 @@ static int dp_ctrl_link_maintenance(struct dp_ctrl_private *ctrl) return ret; } -static int dp_ctrl_on_stream_phy_test_report(struct dp_ctrl *dp_ctrl); - -static int dp_ctrl_process_phy_test_request(struct dp_ctrl_private *ctrl) -{ - int ret = 0; - - if (!ctrl->link->phy_params.phy_test_pattern_sel) { - drm_dbg_dp(ctrl->drm_dev, - "no test pattern selected by sink\n"); - return ret; - } - - /* - * The global reset will need DP link related clocks to be - * running. Add the global reset just before disabling the - * link clocks and core clocks. - */ - ret = dp_ctrl_off(&ctrl->dp_ctrl); - if (ret) { - DRM_ERROR("failed to disable DP controller\n"); - return ret; - } - - ret = dp_ctrl_on_link(&ctrl->dp_ctrl); - if (!ret) - ret = dp_ctrl_on_stream_phy_test_report(&ctrl->dp_ctrl); - else - DRM_ERROR("failed to enable DP link controller\n"); - - return ret; -} - static bool dp_ctrl_send_phy_test_pattern(struct dp_ctrl_private *ctrl) { bool success = false; @@ -1618,6 +1584,56 @@ static bool dp_ctrl_send_phy_test_pattern(struct dp_ctrl_private *ctrl) return success; } +static int dp_ctrl_on_stream_phy_test_report(struct dp_ctrl *dp_ctrl) +{ + int ret; + struct dp_ctrl_private *ctrl; + + ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + + ctrl->dp_ctrl.pixel_rate = ctrl->panel->dp_mode.drm_mode.clock; + + ret = dp_ctrl_enable_stream_clocks(ctrl); + if (ret) { + DRM_ERROR("Failed to start pixel clocks. ret=%d\n", ret); + return ret; + } + + dp_ctrl_send_phy_test_pattern(ctrl); + + return 0; +} + +static int dp_ctrl_process_phy_test_request(struct dp_ctrl_private *ctrl) +{ + int ret = 0; + + if (!ctrl->link->phy_params.phy_test_pattern_sel) { + drm_dbg_dp(ctrl->drm_dev, + "no test pattern selected by sink\n"); + return ret; + } + + /* + * The global reset will need DP link related clocks to be + * running. Add the global reset just before disabling the + * link clocks and core clocks. + */ + ret = dp_ctrl_off(&ctrl->dp_ctrl); + if (ret) { + DRM_ERROR("failed to disable DP controller\n"); + return ret; + } + + ret = dp_ctrl_on_link(&ctrl->dp_ctrl); + if (!ret) + ret = dp_ctrl_on_stream_phy_test_report(&ctrl->dp_ctrl); + else + DRM_ERROR("failed to enable DP link controller\n"); + + return ret; +} + void dp_ctrl_handle_sink_request(struct dp_ctrl *dp_ctrl) { struct dp_ctrl_private *ctrl; @@ -1815,26 +1831,6 @@ static int dp_ctrl_link_retrain(struct dp_ctrl_private *ctrl) return dp_ctrl_setup_main_link(ctrl, &training_step); } -static int dp_ctrl_on_stream_phy_test_report(struct dp_ctrl *dp_ctrl) -{ - int ret; - struct dp_ctrl_private *ctrl; - - ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); - - ctrl->dp_ctrl.pixel_rate = ctrl->panel->dp_mode.drm_mode.clock; - - ret = dp_ctrl_enable_stream_clocks(ctrl); - if (ret) { - DRM_ERROR("Failed to start pixel clocks. ret=%d\n", ret); - return ret; - } - - dp_ctrl_send_phy_test_pattern(ctrl); - - return 0; -} - int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool force_link_train) { int ret = 0; -- https://chromeos.dev