[PATCH 6.4 313/800] arm64: dts: qcom: sm8350: correct PCI phy unit address

Greg Kroah-Hartman
2023-07-16T20:09:07Z

From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

[ Upstream commit ab98c21bc9246f421a6ae70e69f1b73cea6f85e3 ]

Match unit-address to reg entry to fix dtbs W=1 warnings:

Warning (simple_bus_reg): /soc@0/phy@1c0f000: simple-bus unit address format error, expected "1c0e000"

Fixes: 6daee40678a0 ("arm64: dts: qcom: sm8350: add PCIe devices")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230419211856.79332-14-krzysztof.kozlowski@linaro.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index a9af730e0b1c0..5ca21cd1cbec6 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1638,7 +1638,7 @@ pcie1: pci@1c08000 {
status = "disabled";
};

- pcie1_phy: phy@1c0f000 {
+ pcie1_phy: phy@1c0e000 {
compatible = "qcom,sm8350-qmp-gen3x2-pcie-phy";
reg = <0 0x01c0e000 0 0x2000>;
clocks = <&gcc GCC_PCIE_1_AUX_CLK>,
--
2.39.2