From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 268AB648 for ; Sat, 22 Jul 2023 19:08:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1690052880; x=1721588880; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=QLPVmH8OKhS156FijxUUbjl5TQT038tMDl99vshP4rU=; b=nJjjH4F5W3nw3oQ+N0i9HQ/TxZI9nDuRBXxZZCf2xsV+ohwnVkkDkSbz oPtjrYgo6o5UfvJ90DmQ8zkoKVuIteCZEiv7Rr97kTceW74Z03e1QIJFn IiOJvuCxEeAdEH1xPfonz9s4R6pljyhRzZU004NKCyIBWCDOxanB6QeW3 9y5x6MGddkQoNbEK0VYmqRKP48KPwXhSIARHvBpqFc1eLEszI1zORcQJl rwDjNCFVTQW1KeDpxjsTSx69F+z4kAdSEaDS/phNCmmmGbVg5NsCPCI/h I1I7bNvFRWD5DY8hGtuoV2hPmYePEYhwAz86OKNDHR3RvHXG+Z5+6nagA w==; X-IronPort-AV: E=McAfee;i="6600,9927,10779"; a="346823995" X-IronPort-AV: E=Sophos;i="6.01,224,1684825200"; d="scan'208";a="346823995" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jul 2023 12:07:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10779"; a="815368098" X-IronPort-AV: E=Sophos;i="6.01,224,1684825200"; d="scan'208";a="815368098" Received: from agluck-desk3.sc.intel.com ([172.25.222.74]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jul 2023 12:07:52 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Peter Newman , Jonathan Corbet , Shuah Khan , x86@kernel.org Cc: Shaopeng Tan , James Morse , Jamie Iles , Babu Moger , Randy Dunlap , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v4 7/7] selftests/resctrl: Adjust effective L3 cache size when SNC enabled Date: Sat, 22 Jul 2023 12:07:40 -0700 Message-Id: <20230722190740.326190-8-tony.luck@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230722190740.326190-1-tony.luck@intel.com> References: <20230713163207.219710-1-tony.luck@intel.com> <20230722190740.326190-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sub-NUMA Cluster divides CPUs sharing an L3 cache into separate NUMA nodes. Systems may support splitting into either two or four nodes. When SNC mode is enabled the effective amount of L3 cache available for allocation is divided by the number of nodes per L3. Detect which SNC mode is active by comparing the number of CPUs that share a cache with CPU0, with the number of CPUs on node0. Reported-by: "Shaopeng Tan (Fujitsu)" Closes: https://lore.kernel.org/r/TYAPR01MB6330B9B17686EF426D2C3F308B25A@TYAPR01MB6330.jpnprd01.prod.outlook.com Signed-off-by: Tony Luck --- tools/testing/selftests/resctrl/resctrl.h | 1 + tools/testing/selftests/resctrl/resctrlfs.c | 57 +++++++++++++++++++++ 2 files changed, 58 insertions(+) diff --git a/tools/testing/selftests/resctrl/resctrl.h b/tools/testing/selftests/resctrl/resctrl.h index 87e39456dee0..a8b43210b573 100644 --- a/tools/testing/selftests/resctrl/resctrl.h +++ b/tools/testing/selftests/resctrl/resctrl.h @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include diff --git a/tools/testing/selftests/resctrl/resctrlfs.c b/tools/testing/selftests/resctrl/resctrlfs.c index fb00245dee92..79eecbf9f863 100644 --- a/tools/testing/selftests/resctrl/resctrlfs.c +++ b/tools/testing/selftests/resctrl/resctrlfs.c @@ -130,6 +130,61 @@ int get_resource_id(int cpu_no, int *resource_id) return 0; } +/* + * Count number of CPUs in a /sys bit map + */ +static int count_sys_bitmap_bits(char *name) +{ + FILE *fp = fopen(name, "r"); + int count = 0, c; + + if (!fp) + return 0; + + while ((c = fgetc(fp)) != EOF) { + if (!isxdigit(c)) + continue; + switch (c) { + case 'f': + count++; + case '7': case 'b': case 'd': case 'e': + count++; + case '3': case '5': case '6': case '9': case 'a': case 'c': + count++; + case '1': case '2': case '4': case '8': + count++; + } + } + fclose(fp); + + return count; +} + +/* + * Detect SNC by compating #CPUs in node0 with #CPUs sharing LLC with CPU0 + * Try to get this right, even if a few CPUs are offline so that the number + * of CPUs in node0 is not exactly half or a quarter of the CPUs sharing the + * LLC of CPU0. + */ +static int snc_ways(void) +{ + int node_cpus, cache_cpus; + + node_cpus = count_sys_bitmap_bits("/sys/devices/system/node/node0/cpumap"); + cache_cpus = count_sys_bitmap_bits("/sys/devices/system/cpu/cpu0/cache/index3/shared_cpu_map"); + + if (!node_cpus || !cache_cpus) { + fprintf(stderr, "Warning could not determine Sub-NUMA Cluster mode\n"); + return 1; + } + + if (4 * node_cpus >= cache_cpus) + return 4; + else if (2 * node_cpus >= cache_cpus) + return 2; + return 1; +} + /* * get_cache_size - Get cache size for a specified CPU * @cpu_no: CPU number @@ -190,6 +245,8 @@ int get_cache_size(int cpu_no, char *cache_type, unsigned long *cache_size) break; } + if (cache_num == 3) + *cache_size /= snc_ways(); return 0; } -- 2.40.1