From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C9EF211706 for ; Mon, 11 Sep 2023 15:02:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4B38EC433C9; Mon, 11 Sep 2023 15:02:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1694444574; bh=WtLrQxuRtM64ILoopPnKJ4D1LsDNvhEkztjLep9XzJo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Zp2LS9Lkh7nz7imrtMRfra/cj8LVk+LHy4fRfLhYVZrQQtQjOFNfexl9n43syO7/E 4TMeCB97W0843kXCOdPzsINOD0SmVQMmgBtulvc23FqkJumUj1wgdEjfESGP8XEE7m i3CcT6jsVXOvkTQP296fpJ71G0It8GcQ0YfDhHmI= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Hansen Dsouza , Alex Hung , George Shen , Daniel Wheeler , Alex Deucher , Sasha Levin Subject: [PATCH 6.1 040/600] drm/amd/display: Guard DCN31 PHYD32CLK logic against chip family Date: Mon, 11 Sep 2023 15:41:13 +0200 Message-ID: <20230911134634.782630918@linuxfoundation.org> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230911134633.619970489@linuxfoundation.org> References: <20230911134633.619970489@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.1-stable review patch. If anyone has any objections, please let me know. ------------------ From: George Shen [ Upstream commit 25b054c3c89cb6a7106a7982f0f70e83d0797dab ] [Why] Current yellow carp B0 PHYD32CLK logic is incorrectly applied to other ASICs. [How] Add guard to check chip family is yellow carp before applying logic. Reviewed-by: Hansen Dsouza Acked-by: Alex Hung Signed-off-by: George Shen Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c index cef32a1f91cdc..b735e548e26dc 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c @@ -84,7 +84,8 @@ static enum phyd32clk_clock_source get_phy_mux_symclk( struct dcn_dccg *dccg_dcn, enum phyd32clk_clock_source src) { - if (dccg_dcn->base.ctx->asic_id.hw_internal_rev == YELLOW_CARP_B0) { + if (dccg_dcn->base.ctx->asic_id.chip_family == FAMILY_YELLOW_CARP && + dccg_dcn->base.ctx->asic_id.hw_internal_rev == YELLOW_CARP_B0) { if (src == PHYD32CLKC) src = PHYD32CLKF; if (src == PHYD32CLKD) -- 2.40.1