[PATCH] x86/apic: Fix APIC MSR access error when x2apic is disabled

[Adrian Huang <adrianhuang0701@gmail.com>]

From: Adrian Huang <ahuang12@lenovo.com>

When appending the 'iommu=off' kernel parameter, the kernel complains
about the following error message [1]:

unchecked MSR access error: RDMSR from 0x802 at rIP: 0xffffffff94079992 (native_apic_msr_read+0x12/0x50)

The root cause is that:
  1. x2apic_mode is configured as '1' in check_x2apic().
  2. apic_x2apic_cluster (assigned to global variable 'apic') is
     selected in default_acpi_madt_oem_check().
  3. x2apic_disable() is invoked in try_to_enable_x2apic().
     Call path:
       enable_IR_x2apic
        |- try_to_enable_x2apic
          |- x2apic_disable
            |- __x2apic_disable
            |- apic_set_fixmap
              |- apic_read_boot_cpu_id(false)
  4. read_apic_id() in apic_read_boot_cpu_id() invokes
     native_apic_msr_read(), which leads to the error message.
     Call path:
       apic_read_boot_cpu_id
         |- read_apic_id
           |- apic_read
             |- apic->read() ['apic' points to apic_x2apic_cluster]
	       |- native_apic_msr_read

Since x2apic mode has been disabled by writing MSR_IA32_APICBASE in
__x2apic_disable, the upcoming MSR accesses will trigger the MSR
access error. Note that APIC and x2APIC registers are accessed via
MMIO in xapic mode and those regiters are access via the MSR-based
interface in x2apic mode [2].

Fix the issue by checking if boot_cpu_physical_apicid has been
initialized.

[1] https://gist.github.com/AdrianHuang/9e5ce38d410af3ccd0b5ac1703e032bc
[2] Chapter 16, AMD64 Architecture Programmer’s Manual Volume 2:
    System Programming

Fixes: d10a904435fa ("x86/apic: Consolidate boot_cpu_physical_apicid initialization sites")
Signed-off-by: Adrian Huang <ahuang12@lenovo.com>
---
 arch/x86/kernel/apic/apic.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 4667bc4b00ab..6700d6f266ca 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1703,6 +1703,9 @@ static __init void apic_read_boot_cpu_id(bool x2apic)
 		boot_cpu_physical_apicid = native_apic_msr_read(APIC_ID);
 		boot_cpu_apic_version = GET_APIC_VERSION(native_apic_msr_read(APIC_LVR));
 	} else {
+		if (boot_cpu_physical_apicid != BAD_APICID)
+			return;
+
 		boot_cpu_physical_apicid = read_apic_id();
 		boot_cpu_apic_version = GET_APIC_VERSION(apic_read(APIC_LVR));
 	}
-- 
2.25.1