From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDC00C129; Mon, 1 Apr 2024 16:23:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711988584; cv=none; b=ZnfYMOjwN1MWUsioqrZZ3oDXxCzf2Flk7+JrHTO9nwdXh0iPokBA7ffEe9vrbNifjfojXQeUstGSkxXelSC/+4pBQinMP1t5TnRYLkQUSk5rB2VLgT9PQgN5mal1sQW1TCy4jd/0Ao6jBG8ki2s28ZKZvaWkA82CXD2PUqQpmpI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711988584; c=relaxed/simple; bh=wawCy+jAIrNWYj1JV9UCkJHnsR4GWVebJx8Al5FlCjo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XF3wAJka0dyf0hYrsStDqqzIlJ/8+qsJ6rAvVliob0d86FBSj0HU5dxVqlAAO3QHZO3hGdtXu9vwZVZMbiWFQAQQwRfuKrjly+rxxP4i2gBNwWPBD5m1sAY4BHeYqcVSZ2iyLuwL//Kay34M3n1uvZhqv3QhTo08yr3JCUTLHVU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=DdSjqVEB; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="DdSjqVEB" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4B7D1C433F1; Mon, 1 Apr 2024 16:23:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1711988583; bh=wawCy+jAIrNWYj1JV9UCkJHnsR4GWVebJx8Al5FlCjo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DdSjqVEBWyv1LtHCYLiet2ga7UxjJbcQREDekIMy+UssQfxU5+xUqhkXcfAkWTvqF 2SX0JF7/qhvSpywHgZUj4chtqn1OJNFzv9mUVz8P+E895Dfi2MWSN3kO8veZPhyJsh WHmTon1cABG/y/A0k6E0XKzoqMBn5U0XNgZQgo4s= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Xiaotian Wu , Miao Wang , Xing Li , Hongchen Zhang , Rui Wang , Huacai Chen , Sasha Levin Subject: [PATCH 6.7 199/432] LoongArch: Change __my_cpu_offset definition to avoid mis-optimization Date: Mon, 1 Apr 2024 17:43:06 +0200 Message-ID: <20240401152559.073796495@linuxfoundation.org> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240401152553.125349965@linuxfoundation.org> References: <20240401152553.125349965@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.7-stable review patch. If anyone has any objections, please let me know. ------------------ From: Huacai Chen [ Upstream commit c87e12e0e8c1241410e758e181ca6bf23efa5b5b ] >>From GCC commit 3f13154553f8546a ("df-scan: remove ad-hoc handling of global regs in asms"), global registers will no longer be forced to add to the def-use chain. Then current_thread_info(), current_stack_pointer and __my_cpu_offset may be lifted out of the loop because they are no longer treated as "volatile variables". This optimization is still correct for the current_thread_info() and current_stack_pointer usages because they are associated to a thread. However it is wrong for __my_cpu_offset because it is associated to a CPU rather than a thread: if the thread migrates to a different CPU in the loop, __my_cpu_offset should be changed. Change __my_cpu_offset definition to treat it as a "volatile variable", in order to avoid such a mis-optimization. Cc: stable@vger.kernel.org Reported-by: Xiaotian Wu Reported-by: Miao Wang Signed-off-by: Xing Li Signed-off-by: Hongchen Zhang Signed-off-by: Rui Wang Signed-off-by: Huacai Chen Signed-off-by: Sasha Levin --- arch/loongarch/include/asm/percpu.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/loongarch/include/asm/percpu.h b/arch/loongarch/include/asm/percpu.h index 9b36ac003f890..8f290e5546cf7 100644 --- a/arch/loongarch/include/asm/percpu.h +++ b/arch/loongarch/include/asm/percpu.h @@ -29,7 +29,12 @@ static inline void set_my_cpu_offset(unsigned long off) __my_cpu_offset = off; csr_write64(off, PERCPU_BASE_KS); } -#define __my_cpu_offset __my_cpu_offset + +#define __my_cpu_offset \ +({ \ + __asm__ __volatile__("":"+r"(__my_cpu_offset)); \ + __my_cpu_offset; \ +}) #define PERCPU_OP(op, asm_op, c_op) \ static __always_inline unsigned long __percpu_##op(void *ptr, \ -- 2.43.0