From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E83D017E90E; Mon, 27 May 2024 19:14:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716837278; cv=none; b=XGwcXIeK4Mo3rZ05ogEWCksSO4uP1t5G9gAuymJDTp+qg38THF63qDqXyB42vdhStfXEeb6rr4Q//ICSXnvY7xjGCtXoDJmd/BzEK2tijbTOrfQei1TagNqlN1Oa8ceXdvy8+I7RI53XkkymKT3/wj6MtP2L9atxOq80Bzv/1hA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716837278; c=relaxed/simple; bh=NMX/dpRMxtalpi4o1fjwTJ2Zwyh5W6QtdDPJJvA+2lw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SMSDE9rtC0e+FeDOjq8xDtIq+awJNJIi+Ry9HRhvWUOiTph/lT9BXb6So8iLnex5bXg3HXKXf1dKABqlCtn0PGgPvMxU2+TqBMOTjnrfue6pQwcK55LyikTwCoUsJrGmwQms6TCn8EKVfaOc9Rrxq2dURJuRFRPvq4/BFcMj9rc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=Jn5UF+FR; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="Jn5UF+FR" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7976AC2BBFC; Mon, 27 May 2024 19:14:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1716837277; bh=NMX/dpRMxtalpi4o1fjwTJ2Zwyh5W6QtdDPJJvA+2lw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Jn5UF+FR+rZRv0tEZSfD8htj7USEhz46B0a6QEctjLmDBOGRQGK4wEeXnrDYrIFwp l6GdKTT3XyPvnwWZ9QQqdtEmgY3vM7dQ+pAmQq9qfgEABqeMTOPdBQ0u3cbJkmehlv vJ+l77cC4nHjtn0C5YccEAjX4KOVvzuhvVrRgN0Y= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Alexandre Mergnat , AngeloGioacchino Del Regno , Stephen Boyd , Sasha Levin Subject: [PATCH 6.9 362/427] clk: mediatek: mt8365-mm: fix DPI0 parent Date: Mon, 27 May 2024 20:56:49 +0200 Message-ID: <20240527185633.921198042@linuxfoundation.org> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240527185601.713589927@linuxfoundation.org> References: <20240527185601.713589927@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.9-stable review patch. If anyone has any objections, please let me know. ------------------ From: Alexandre Mergnat [ Upstream commit 4c0c087772d7e29bc2489ddb068d5167140bfc38 ] To have a working display through DPI, a workaround has been implemented downstream to add "mm_dpi0_dpi0" and "dpi0_sel" to the DPI node. Shortly, that add an extra clock. It seems consistent to have the "dpi0_sel" as parent. Additionnaly, "vpll_dpix" isn't used/managed. Then, set the "mm_dpi0_dpi0" parent clock to "dpi0_sel". The new clock tree is: clk26m lvdspll lvdspll_X (2, 4, 8, 16) dpi0_sel mm_dpi0_dpi0 Fixes: d46adccb7966 ("clk: mediatek: add driver for MT8365 SoC") Signed-off-by: Alexandre Mergnat Link: https://lore.kernel.org/r/20231023-display-support-v3-12-53388f3ed34b@baylibre.com Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin --- drivers/clk/mediatek/clk-mt8365-mm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/mediatek/clk-mt8365-mm.c b/drivers/clk/mediatek/clk-mt8365-mm.c index 01a2ef8f594ef..3f62ec7507336 100644 --- a/drivers/clk/mediatek/clk-mt8365-mm.c +++ b/drivers/clk/mediatek/clk-mt8365-mm.c @@ -53,7 +53,7 @@ static const struct mtk_gate mm_clks[] = { GATE_MM0(CLK_MM_MM_DSI0, "mm_dsi0", "mm_sel", 17), GATE_MM0(CLK_MM_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 18), GATE_MM0(CLK_MM_MM_MDP_RDMA1, "mm_mdp_rdma1", "mm_sel", 19), - GATE_MM0(CLK_MM_DPI0_DPI0, "mm_dpi0_dpi0", "vpll_dpix", 20), + GATE_MM0(CLK_MM_DPI0_DPI0, "mm_dpi0_dpi0", "dpi0_sel", 20), GATE_MM0(CLK_MM_MM_FAKE, "mm_fake", "mm_sel", 21), GATE_MM0(CLK_MM_MM_SMI_COMMON, "mm_smi_common", "mm_sel", 22), GATE_MM0(CLK_MM_MM_SMI_LARB0, "mm_smi_larb0", "mm_sel", 23), -- 2.43.0