From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 246921B29A4; Thu, 6 Jun 2024 14:16:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717683401; cv=none; b=biCbyY8G4ZdQ29mCl/eoTy96l/qhxwNn7bm1H4HQDh7Kf6Ira/ALJFCfvoY+SizHCTaIyCWfBkJyKPMF1wx8CprMic/XobBPH2Ks7eOu2OETxBsFJ643Z0Mi+1vxHbcpi/i6pCtwLB8az1bYQhKiIqVs8mUfgU/ni7Yp8RL1wvo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717683401; c=relaxed/simple; bh=XZ9b4P0C3TrnV8NftFjB3BeVEXUwKyFaGKbM2LrNfRI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gwkiRbb/E72sGFe4YvECPZMQyr+T7VqxP0qvunV+WGTcNMbnQIcoc7vz/JpwULvzYv/mJh4kezurnPo2Cs2xQhLP2auf0OSDH2+wvv8ebyj5A0rMGh490iuTq13U444WYAGhIHw69655Dr88GsyWXiCwqbDLxKjFNf04BpxNXEA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=HUWx2ElF; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="HUWx2ElF" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0463BC2BD10; Thu, 6 Jun 2024 14:16:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1717683401; bh=XZ9b4P0C3TrnV8NftFjB3BeVEXUwKyFaGKbM2LrNfRI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HUWx2ElFQQZauNhfecupCZNNhyvMecvPwuQ3CiU/DzyQyCndGCFJ2NQdIV6/WxuTY 6JX9fFF9DrpHcIRwF/a31vGU9aZ4IsNBz0ox8KJRyMGeTphJR0rOUju4VHK18YQtnV sYp3OH3UVI9c4YSZB07vD26qvVDzcCchiIwtA3uo= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Alexandre Mergnat , AngeloGioacchino Del Regno , Stephen Boyd , Sasha Levin Subject: [PATCH 6.6 345/744] clk: mediatek: mt8365-mm: fix DPI0 parent Date: Thu, 6 Jun 2024 16:00:17 +0200 Message-ID: <20240606131743.538711451@linuxfoundation.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240606131732.440653204@linuxfoundation.org> References: <20240606131732.440653204@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.6-stable review patch. If anyone has any objections, please let me know. ------------------ From: Alexandre Mergnat [ Upstream commit 4c0c087772d7e29bc2489ddb068d5167140bfc38 ] To have a working display through DPI, a workaround has been implemented downstream to add "mm_dpi0_dpi0" and "dpi0_sel" to the DPI node. Shortly, that add an extra clock. It seems consistent to have the "dpi0_sel" as parent. Additionnaly, "vpll_dpix" isn't used/managed. Then, set the "mm_dpi0_dpi0" parent clock to "dpi0_sel". The new clock tree is: clk26m lvdspll lvdspll_X (2, 4, 8, 16) dpi0_sel mm_dpi0_dpi0 Fixes: d46adccb7966 ("clk: mediatek: add driver for MT8365 SoC") Signed-off-by: Alexandre Mergnat Link: https://lore.kernel.org/r/20231023-display-support-v3-12-53388f3ed34b@baylibre.com Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin --- drivers/clk/mediatek/clk-mt8365-mm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/mediatek/clk-mt8365-mm.c b/drivers/clk/mediatek/clk-mt8365-mm.c index 01a2ef8f594ef..3f62ec7507336 100644 --- a/drivers/clk/mediatek/clk-mt8365-mm.c +++ b/drivers/clk/mediatek/clk-mt8365-mm.c @@ -53,7 +53,7 @@ static const struct mtk_gate mm_clks[] = { GATE_MM0(CLK_MM_MM_DSI0, "mm_dsi0", "mm_sel", 17), GATE_MM0(CLK_MM_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 18), GATE_MM0(CLK_MM_MM_MDP_RDMA1, "mm_mdp_rdma1", "mm_sel", 19), - GATE_MM0(CLK_MM_DPI0_DPI0, "mm_dpi0_dpi0", "vpll_dpix", 20), + GATE_MM0(CLK_MM_DPI0_DPI0, "mm_dpi0_dpi0", "dpi0_sel", 20), GATE_MM0(CLK_MM_MM_FAKE, "mm_fake", "mm_sel", 21), GATE_MM0(CLK_MM_MM_SMI_COMMON, "mm_smi_common", "mm_sel", 22), GATE_MM0(CLK_MM_MM_SMI_LARB0, "mm_smi_larb0", "mm_sel", 23), -- 2.43.0