From: Tony Luck <tony.luck@intel.com>
To: Jonathan Corbet <corbet@lwn.net>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, patches@lists.linux.dev,
Tony Luck <tony.luck@intel.com>
Subject: [PATCH] Documentation/x86: Switch to new Intel CPU model defines
Date: Tue, 11 Jun 2024 13:48:14 -0700 [thread overview]
Message-ID: <20240611204814.353821-1-tony.luck@intel.com> (raw)
New CPU #defines encode vendor and family as well as model
so "_FAM6" is no longer used in the #define names.
Signed-off-by: Tony Luck <tony.luck@intel.com>
---
Documentation/arch/x86/cpuinfo.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/arch/x86/cpuinfo.rst b/Documentation/arch/x86/cpuinfo.rst
index 8895784d4784..6ef426a52cdc 100644
--- a/Documentation/arch/x86/cpuinfo.rst
+++ b/Documentation/arch/x86/cpuinfo.rst
@@ -112,7 +112,7 @@ conditions are met, the features are enabled by the set_cpu_cap or
setup_force_cpu_cap macros. For example, if bit 5 is set in MSR_IA32_CORE_CAPS,
the feature X86_FEATURE_SPLIT_LOCK_DETECT will be enabled and
"split_lock_detect" will be displayed. The flag "ring3mwait" will be
-displayed only when running on INTEL_FAM6_XEON_PHI_[KNL|KNM] processors.
+displayed only when running on INTEL_XEON_PHI_[KNL|KNM] processors.
d: Flags can represent purely software features.
------------------------------------------------
--
2.45.0
next reply other threads:[~2024-06-11 20:48 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-11 20:48 Tony Luck [this message]
2024-06-17 22:28 ` [PATCH] Documentation/x86: Switch to new Intel CPU model defines Jonathan Corbet
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