From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A6E4B199EA3; Tue, 16 Jul 2024 16:05:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721145947; cv=none; b=NA46OWQ+SQiuUTn7SZZlLRmIIHUf9hHHrrgUvF/uDR9Z8z606nZhvE0YIx9Qmx+Z9zcd4S7mFJjVG3pLc5CmEJ6KhwDbQpUVMDqqZTn/S7aEgc7OFpesOaj0ApJr/h9pfEgyxd3vrMfehlait9exGkZvRfIAjL3DP31H8FC35V4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721145947; c=relaxed/simple; bh=GLWsoqS9G8L5M4y6BJ5KEErMBCq66lhqEL448T1jo7s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nuDhrLAI/9WjWiyLtSE1aVbnmxZUSKFvEPOLOR8Cj6pTxyjFVdVThzyzDbyz4HbNqN809CQlmjnbYDGSaaFjf0MQRYEdO97wPlAXEgdz+MTbBY3BhcoVMCJTY3Ix0JInNYKcSettN3LY4Nlx3PteRZ92cgNSd0pRirlIYvjignw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=t5dMJdTT; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="t5dMJdTT" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2BDEAC116B1; Tue, 16 Jul 2024 16:05:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1721145947; bh=GLWsoqS9G8L5M4y6BJ5KEErMBCq66lhqEL448T1jo7s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=t5dMJdTTS0PN3fUt3NVCXlaFvystpewmdrwGNh0N+I/wh88LT0MUJ9QL8TDIxr9Gq Zuzs/4Zh9n4OFV5Wghot/ZpFhgLffQuk63IF+36oDwhZiUSOUFWno5cm2dLR8JDDBu 9zRJ2Hkt0ZNFREeRnafHnK6eIsIMtcSbebsFIZJ8= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Rodrigo Siqueira , Wayne Lin , Alex Hung , Alex Deucher , Sasha Levin Subject: [PATCH 5.15 010/144] drm/amd/display: Check pipe offset before setting vblank Date: Tue, 16 Jul 2024 17:31:19 +0200 Message-ID: <20240716152752.928121864@linuxfoundation.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240716152752.524497140@linuxfoundation.org> References: <20240716152752.524497140@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: Alex Hung [ Upstream commit 5396a70e8cf462ec5ccf2dc8de103c79de9489e6 ] pipe_ctx has a size of MAX_PIPES so checking its index before accessing the array. This fixes an OVERRUN issue reported by Coverity. Reviewed-by: Rodrigo Siqueira Acked-by: Wayne Lin Signed-off-by: Alex Hung Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- .../drm/amd/display/dc/irq/dce110/irq_service_dce110.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c b/drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c index 378cc11aa0476..3d8b2b127f3f5 100644 --- a/drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c +++ b/drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c @@ -211,8 +211,12 @@ bool dce110_vblank_set(struct irq_service *irq_service, info->ext_id); uint8_t pipe_offset = dal_irq_src - IRQ_TYPE_VBLANK; - struct timing_generator *tg = - dc->current_state->res_ctx.pipe_ctx[pipe_offset].stream_res.tg; + struct timing_generator *tg; + + if (pipe_offset >= MAX_PIPES) + return false; + + tg = dc->current_state->res_ctx.pipe_ctx[pipe_offset].stream_res.tg; if (enable) { if (!tg || !tg->funcs->arm_vert_intr(tg, 2)) { -- 2.43.0