From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C131B18455E; Tue, 30 Jul 2024 16:05:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722355541; cv=none; b=sPFuLtMMsBjSbWdokWtEv/obFWUxeMhCVGOndu88s4Aat7LJ4/pESRQTwgQuVOOsIFqXSUo3cGT9blZUmDfNEcOWHMgQr5ejc9acRFSxBzQ+u1ZKQ1zBO/mUy3md4nUEewV1iotPsMdA7rKmSFNW/Cae1zA/qbzNWW2xXlSYVFo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722355541; c=relaxed/simple; bh=bCpkECuQ5c94ztaRNaGmJOv1wIg3YYnOjjVt1U28B8k=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=jd++/Dlk1BPps+uBHOZ42ue5hdpBOpIBrEl6rsu6RD5nOXZ+8WOkLQRPuZ1KenOQAWU877z9b+RKKVP5+g/K5EEYHowj8ILPlQjG+KlE/AZeQ8uISIt1vjz3Dgd7RFkqDU/nNjQONhR2muk/b69kGbug07NC20S23X08SDwLhNw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=CVYyIDGy; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="CVYyIDGy" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 44EC0C32782; Tue, 30 Jul 2024 16:05:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1722355541; bh=bCpkECuQ5c94ztaRNaGmJOv1wIg3YYnOjjVt1U28B8k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CVYyIDGy7iz1rK6YwxmZ1WVn10ZQooHgx9+phGjrq0oeWJYEuah3XoM2pqwL8koJj 3qPHB5nZehVl3c5JCbWdhxFKJf50z3l8xYt/8mYNrFaYnXsC1wPTUw3lSZAkRVsjss lm5A4/tMRbeqFZqz4LsFZXW+MPpJLYDlgECChSOU= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Michael Walle , Shawn Guo , Sasha Levin Subject: [PATCH 6.6 067/568] ARM: dts: imx6qdl-kontron-samx6i: fix PHY reset Date: Tue, 30 Jul 2024 17:42:54 +0200 Message-ID: <20240730151642.478905868@linuxfoundation.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240730151639.792277039@linuxfoundation.org> References: <20240730151639.792277039@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.6-stable review patch. If anyone has any objections, please let me know. ------------------ From: Michael Walle [ Upstream commit edfea889a049abe80f0d55c0365bf60fbade272f ] The PHY reset line is connected to both the SoC (GPIO1_25) and the CPLD. We must not use the GPIO1_25 as it will drive against the output buffer of the CPLD. Instead there is another GPIO (GPIO2_01), an input to the CPLD, which will tell the CPLD to assert the PHY reset line. Fixes: 2a51f9dae13d ("ARM: dts: imx6qdl-kontron-samx6i: Add iMX6-based Kontron SMARC-sAMX6i module") Fixes: 5694eed98cca ("ARM: dts: imx6qdl-kontron-samx6i: move phy reset into phy-node") Signed-off-by: Michael Walle Signed-off-by: Shawn Guo Signed-off-by: Sasha Levin --- arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi index d8c1dfb8c9abb..d6c049b9a9c69 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi @@ -269,7 +269,7 @@ mdio { ethphy: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <1>; - reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; reset-assert-us = <1000>; }; }; @@ -516,7 +516,7 @@ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 - MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 /* RST_GBE0_PHY# */ + MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 /* RST_GBE0_PHY# */ >; }; -- 2.43.0