From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 99D461779B1; Tue, 8 Oct 2024 12:35:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728390911; cv=none; b=W3sT2ssBGq7G7/AG5+I+ABxq/SEwy3033xaPVwguRk2BLdD1SAIWM4sU2baJjlzAUZu5TVcIVwzC79CLmgDeGuxwraYSbUEk3GDmbv8lNChjvEM9w9Avn/FM8yeaFr+YkAn+doYOOJtu9Hna5QJQyZSsOp7jTcl5L66KPs0DYgM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728390911; c=relaxed/simple; bh=82H4TnK/JcTCYbsK/axVRRZczbxDaQ1xyarkpkjyvCA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=NxZVQht050Ry+8XooW6udZ7CSUOa4Hq8brWcKacSApfE3LER3PTfMYbwWG8F//zmwSbvZsKu0ffh7PAPS6J6Bwm2LlNxPeimhMi78h1rlGy4oroqwZSsYY5+Wiy7MX8XnTHFkeNPGbqSt0QxjuDkLH+xlBGCWZU9OYmE0keHcQY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=bBV5FChX; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="bBV5FChX" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 17B79C4CEC7; Tue, 8 Oct 2024 12:35:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1728390911; bh=82H4TnK/JcTCYbsK/axVRRZczbxDaQ1xyarkpkjyvCA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bBV5FChXVcgVjovGX3X9u1QfNyFuS67R1DlGZwm6rR4Nhl/p31N0g1Hzd9DSMKvek ai+0AMefslZ4yZKjoqqqG/7rCWN/+RdLHvH59nIlSRpSubz0ZFY/Eusnag9fiYc3G5 v+ZLBtCzo+jXohrr/T/kPtOtbefPJWUHDHZy15jc= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Ajit Pandey , Dmitry Baryshkov , Vladimir Zapolskiy , Bjorn Andersson Subject: [PATCH 6.10 399/482] clk: qcom: clk-alpha-pll: Fix CAL_L_VAL override for LUCID EVO PLL Date: Tue, 8 Oct 2024 14:07:42 +0200 Message-ID: <20241008115704.111319633@linuxfoundation.org> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241008115648.280954295@linuxfoundation.org> References: <20241008115648.280954295@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.10-stable review patch. If anyone has any objections, please let me know. ------------------ From: Ajit Pandey commit fff617979f97c773aaa9432c31cf62444b3bdbd4 upstream. In LUCID EVO PLL CAL_L_VAL and L_VAL bitfields are part of single PLL_L_VAL register. Update for L_VAL bitfield values in PLL_L_VAL register using regmap_write() API in __alpha_pll_trion_set_rate callback will override LUCID EVO PLL initial configuration related to PLL_CAL_L_VAL bit fields in PLL_L_VAL register. Observed random PLL lock failures during PLL enable due to such override in PLL calibration value. Use regmap_update_bits() with L_VAL bitfield mask instead of regmap_write() API to update only PLL_L_VAL bitfields in __alpha_pll_trion_set_rate callback. Fixes: 260e36606a03 ("clk: qcom: clk-alpha-pll: add Lucid EVO PLL configuration interfaces") Cc: stable@vger.kernel.org Signed-off-by: Ajit Pandey Reviewed-by: Dmitry Baryshkov Acked-by: Vladimir Zapolskiy Link: https://lore.kernel.org/r/20240611133752.2192401-2-quic_ajipan@quicinc.com Signed-off-by: Bjorn Andersson Signed-off-by: Greg Kroah-Hartman --- drivers/clk/qcom/clk-alpha-pll.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -1665,7 +1665,7 @@ static int __alpha_pll_trion_set_rate(st if (ret < 0) return ret; - regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l); + regmap_update_bits(pll->clkr.regmap, PLL_L_VAL(pll), LUCID_EVO_PLL_L_VAL_MASK, l); regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a); /* Latch the PLL input */