From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F32F1A76DA; Tue, 15 Oct 2024 11:46:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728992819; cv=none; b=hgWQqyNl1QCquP0FseRI4ItwmOiGlefAficE3b+Ex/QB+ELGqNpr1LU34Q5rvCA808ml+dThxK1/D1xtgclSsVBs137YT2wA3SEz4YyujD0MrhmvBSM+bWc7lhQkzz715eK6KuAytpArfOk68KScdmM8/LlxHnOmFTbYeXXDYC4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728992819; c=relaxed/simple; bh=uLd7yehlnUSfxfyQqeBX39txUi8w1TBjK8rIh+/M1xI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WbBfGTrT3hhWSZYVD5m1C430QHcCHTqmCuDY574JORwaipfDltEoVZSCsYoQsIF3P8IddAAmdC0AlEQHARV7QryUzo/KEpe3GSDWE45xdj3CndpLWJH6byJxhqA822XH5ShuXV09M7Zv9iBTku1zHht0OyjbPoyy0A4hPgzdW/g= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=WeBz5xZf; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="WeBz5xZf" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 266B7C4CEC6; Tue, 15 Oct 2024 11:46:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1728992819; bh=uLd7yehlnUSfxfyQqeBX39txUi8w1TBjK8rIh+/M1xI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WeBz5xZfwpjdHfvQ8iji4BRGHCk3CxexdI1582gB1invoT3jpSUKN82j09kRLM6yD x0joR2JjCQYYt0XyvTGk0PTJdg04PS2b7gCQDeDEEnWvjugHMv8wsBDsahSloHlqrU 0bMpfkrf9AJa4DnML4BTZTpEfaZ8LQUhQW2lyzaY= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Jonas Karlman , Heiko Stuebner , Sasha Levin Subject: [PATCH 5.15 228/691] clk: rockchip: Set parent rate for DCLK_VOP clock on RK3228 Date: Tue, 15 Oct 2024 13:22:56 +0200 Message-ID: <20241015112449.407653458@linuxfoundation.org> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241015112440.309539031@linuxfoundation.org> References: <20241015112440.309539031@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: Jonas Karlman [ Upstream commit 1d34b9757523c1ad547bd6d040381f62d74a3189 ] Similar to DCLK_LCDC on RK3328, the DCLK_VOP on RK3228 is typically parented by the hdmiphy clk and it is expected that the DCLK_VOP and hdmiphy clk rate are kept in sync. Use CLK_SET_RATE_PARENT and CLK_SET_RATE_NO_REPARENT flags, same as used on RK3328, to make full use of all possible supported display modes. Fixes: 0a9d4ac08ebc ("clk: rockchip: set the clock ids for RK3228 VOP") Fixes: 307a2e9ac524 ("clk: rockchip: add clock controller for rk3228") Signed-off-by: Jonas Karlman Link: https://lore.kernel.org/r/20240615170417.3134517-3-jonas@kwiboo.se Signed-off-by: Heiko Stuebner Signed-off-by: Sasha Levin --- drivers/clk/rockchip/clk-rk3228.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c index a24a35553e134..7343d2d7676bc 100644 --- a/drivers/clk/rockchip/clk-rk3228.c +++ b/drivers/clk/rockchip/clk-rk3228.c @@ -409,7 +409,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = { RK2928_CLKSEL_CON(29), 0, 3, DFLAGS), DIV(0, "sclk_vop_pre", "sclk_vop_src", 0, RK2928_CLKSEL_CON(27), 8, 8, DFLAGS), - MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, 0, + MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT, RK2928_CLKSEL_CON(27), 1, 1, MFLAGS), FACTOR(0, "xin12m", "xin24m", 0, 1, 2), -- 2.43.0