From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 59E061C57B1; Tue, 15 Oct 2024 12:06:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728993996; cv=none; b=Ohs2JJWuP30NbF9B8Rk3Py6nVh8PqY1ugpVJ9VwlVdaxJ91FhDb/gln7+QrtW7R62gJqR2P97vRH48XaIYWhkWzxnByqilRtmxR7m3Jf7avcYieXAo9raPwuE8KFAAm88iiXJHG0qvMSFtPSMG/R20NLsBZ2FvRrQ7pgPsUwEZs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728993996; c=relaxed/simple; bh=L5QNx7g4vPCeRpezS42TDytSzij8ouuqVWQRjX8sjLc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=G94bSakpdueS6mx6GoRpg7mRsOU9lQ5xJ9E5xZtlYhy00RJsEXR40Kr1gociuM18If1FahEAYRZOAGlvHzxeAvHM6K/VBAiZUOWn/jkwlDftuhiJQx6MQs2c5f7R/3uYS+b5qXD3uTpsMSbG38G/7sLKOcsWHU2YZan4Ejzg6Ko= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=V9otesrW; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="V9otesrW" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D0EF4C4CEC6; Tue, 15 Oct 2024 12:06:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1728993996; bh=L5QNx7g4vPCeRpezS42TDytSzij8ouuqVWQRjX8sjLc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=V9otesrWKbeg/kW57Ydhp9WfMLjan1cYsDdJ3l4iHg+XvP091SpLZf7nTWY8hWpvT oETAgZ6eUrWL30b06TYG687R4RhPtekZ9Dbv2kPQyuaCnARPV2cEkmiQ9lHEcAakSU QvkVpy5UlYUymArF5dZ0IxuOJovAKCksnzhwG2rc= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Dmitry Baryshkov , Satya Priya Kakitapalli , Bjorn Andersson , Sasha Levin Subject: [PATCH 5.15 576/691] clk: qcom: gcc-sc8180x: Add GPLL9 support Date: Tue, 15 Oct 2024 13:28:44 +0200 Message-ID: <20241015112503.202624044@linuxfoundation.org> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241015112440.309539031@linuxfoundation.org> References: <20241015112440.309539031@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: Satya Priya Kakitapalli [ Upstream commit 818a2f8d5e4ad2c1e39a4290158fe8e39a744c70 ] Add the missing GPLL9 pll and fix the gcc_parents_7 data to use the correct pll hw. Fixes: 4433594bbe5d ("clk: qcom: gcc: Add global clock controller driver for SC8180x") Cc: stable@vger.kernel.org Reviewed-by: Dmitry Baryshkov Signed-off-by: Satya Priya Kakitapalli Link: https://lore.kernel.org/r/20240812-gcc-sc8180x-fixes-v2-3-8b3eaa5fb856@quicinc.com Signed-off-by: Bjorn Andersson Signed-off-by: Sasha Levin --- drivers/clk/qcom/gcc-sc8180x.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/gcc-sc8180x.c b/drivers/clk/qcom/gcc-sc8180x.c index 8c986a60e62c7..ba004281f2944 100644 --- a/drivers/clk/qcom/gcc-sc8180x.c +++ b/drivers/clk/qcom/gcc-sc8180x.c @@ -143,6 +143,23 @@ static struct clk_alpha_pll gpll7 = { }, }; +static struct clk_alpha_pll gpll9 = { + .offset = 0x1c000, + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_TRION], + .clkr = { + .enable_reg = 0x52000, + .enable_mask = BIT(9), + .hw.init = &(const struct clk_init_data) { + .name = "gpll9", + .parent_data = &(const struct clk_parent_data) { + .fw_name = "bi_tcxo", + }, + .num_parents = 1, + .ops = &clk_alpha_pll_fixed_trion_ops, + }, + }, +}; + static const struct parent_map gcc_parent_map_0[] = { { P_BI_TCXO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, @@ -242,7 +259,7 @@ static const struct parent_map gcc_parent_map_7[] = { static const struct clk_parent_data gcc_parents_7[] = { { .fw_name = "bi_tcxo", }, { .hw = &gpll0.clkr.hw }, - { .name = "gppl9" }, + { .hw = &gpll9.clkr.hw }, { .hw = &gpll4.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, }; @@ -4420,6 +4437,7 @@ static struct clk_regmap *gcc_sc8180x_clocks[] = { [GPLL1] = &gpll1.clkr, [GPLL4] = &gpll4.clkr, [GPLL7] = &gpll7.clkr, + [GPLL9] = &gpll9.clkr, }; static const struct qcom_reset_map gcc_sc8180x_resets[] = { -- 2.43.0