From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED4B21EC00A; Tue, 15 Oct 2024 12:13:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728994386; cv=none; b=pMaLJVC9dtiS6DO7zkvYqgCnKFOzoyW0HQbtLzTImKkp0IDotPQtshPpcv7rYmusorzMHQ358pmmjTI/mq18nJsbabpOTlsX+5rRL1W0YqnSNjwqFQBCNKFczE8R3kud1VIeWgMNmtf/8NWlskdAxEemHa/y+Wa4doc4gAKkpBA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728994386; c=relaxed/simple; bh=Yy1GkbUDRyhx/8vMLDWuTcKk5PQiCFNkW0b/XodNctw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=E85HVKcUnWuqlcXOGLIJXMcmQKIs5lXsrVZudfSMLUg4nzvTxEgPvMFabD/WJRYn25fxa7G+DWg04voqm8w0QuF6rMt3Hmx2WfY+b9E01sOYkBgg9ePyFMrTnUlqGaNQDjpjrE4LfYblMU3SQ8Qk8iRmKZ9hbXVb8bmzS7SfYBc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=oLhSiq8p; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="oLhSiq8p" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5E012C4CEC6; Tue, 15 Oct 2024 12:13:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1728994385; bh=Yy1GkbUDRyhx/8vMLDWuTcKk5PQiCFNkW0b/XodNctw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oLhSiq8p1DE12O39qJjuD6tFhGqo7IIfPF8Mqjrb13xHiNLWUDfDb7b8N87omtl6P JhQ+/g1xtVxTE6g8UnjRflQyfoVlaNFFohbtg6Yww/gn2halmI68vE4pCkR8mb3Zfd AfOrJaoky0G/2+MP8kFcbwYDFEKsCOSapQGqrafI= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Sean Anderson , Shannon Nelson , Eric Dumazet , Paolo Abeni Subject: [PATCH 5.15 691/691] net: xilinx: axienet: Schedule NAPI in two steps Date: Tue, 15 Oct 2024 13:30:39 +0200 Message-ID: <20241015112507.742777180@linuxfoundation.org> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241015112440.309539031@linuxfoundation.org> References: <20241015112440.309539031@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: Sean Anderson commit ba0da2dc934ec5ac32bbeecbd0670da16ba03565 upstream. As advised by Documentation/networking/napi.rst, masking IRQs after calling napi_schedule can be racy. Avoid this by only masking/scheduling if napi_schedule_prep returns true. Fixes: 9e2bc267e780 ("net: axienet: Use NAPI for TX completion path") Fixes: cc37610caaf8 ("net: axienet: implement NAPI and GRO receive") Signed-off-by: Sean Anderson Reviewed-by: Shannon Nelson Reviewed-by: Eric Dumazet Link: https://patch.msgid.link/20240913145711.2284295-1-sean.anderson@linux.dev Signed-off-by: Paolo Abeni Signed-off-by: Greg Kroah-Hartman --- drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c @@ -1070,9 +1070,10 @@ static irqreturn_t axienet_tx_irq(int ir u32 cr = lp->tx_dma_cr; cr &= ~(XAXIDMA_IRQ_IOC_MASK | XAXIDMA_IRQ_DELAY_MASK); - axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr); - - napi_schedule(&lp->napi_tx); + if (napi_schedule_prep(&lp->napi_tx)) { + axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr); + __napi_schedule(&lp->napi_tx); + } } return IRQ_HANDLED; @@ -1114,9 +1115,10 @@ static irqreturn_t axienet_rx_irq(int ir u32 cr = lp->rx_dma_cr; cr &= ~(XAXIDMA_IRQ_IOC_MASK | XAXIDMA_IRQ_DELAY_MASK); - axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); - - napi_schedule(&lp->napi_rx); + if (napi_schedule_prep(&lp->napi_rx)) { + axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); + __napi_schedule(&lp->napi_rx); + } } return IRQ_HANDLED;