From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 51CD81DE88A; Wed, 19 Feb 2025 08:34:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739954069; cv=none; b=TmPEIgPedxBxnuvfMFVJcHV1xwhEVVj5tAv4KPKBa49xwdqT1ehQk5hRKhxiqL8EQbWik9IvrKVGnEM29S+quDHo0wIZOCGa/2kvToVa7MNdEgDxEfVt4mEUpLFjgZm+jPLemEOgZqnj7zBTB1v7wsJydyCAiv5Voon782PAjuc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739954069; c=relaxed/simple; bh=a+pMtoeXN4iOikiSf7t3aOKZjQjWS2TZRZA0E0Szb8I=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=pZ62lgqnznyO4aXeO1lc9P1otko13S3Uye8RRRIbgWD/P7zHGDo6BeDOG5BrGId1PxJMQ+UTv+D7z1GBfWvIXMYtwVi/4S/9cF9ym1DbcWeapeExfHLNzkMcMsQdAvCB0Wn5gzWhJHaIn8fWvDd3ttOZpVW9btRkfKKb9ufMzPs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=b4HgAxfW; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="b4HgAxfW" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C1F13C4CED1; Wed, 19 Feb 2025 08:34:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1739954069; bh=a+pMtoeXN4iOikiSf7t3aOKZjQjWS2TZRZA0E0Szb8I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=b4HgAxfWkTg/d5pImRiZH7A2QJodpheNVd0iC8W77+Ds8sV1cP3HgIZPTRVjQ61cT Y4jfyoo7BrAc6p8LuV2Z04Lt5UZC0yhsEZH7Wl8/uP1HoeK0uU6+fcja6SvSjq0qxV EfMYb5u5EolTOruKIZ7kHmg2TWKPQrrISqcTVd/Q= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Takashi Iwai , Bjorn Helgaas , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Sasha Levin Subject: [PATCH 6.13 087/274] PCI/DPC: Quirk PIO log size for Intel Raptor Lake-P Date: Wed, 19 Feb 2025 09:25:41 +0100 Message-ID: <20250219082613.025689182@linuxfoundation.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250219082609.533585153@linuxfoundation.org> References: <20250219082609.533585153@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 6.13-stable review patch. If anyone has any objections, please let me know. ------------------ From: Takashi Iwai [ Upstream commit b198499c7d2508a76243b98e7cca992f6fd2b7f7 ] Apparently the Raptor Lake-P reference firmware configures the PIO log size correctly, but some vendor BIOSes, including at least ASUSTeK COMPUTER INC. Zenbook UX3402VA_UX3402VA, do not. Apply the quirk for Raptor Lake-P. This prevents kernel complaints like: DPC: RP PIO log size 0 is invalid and also enables the DPC driver to dump the RP PIO Log registers when DPC is triggered. Note that the bug report also mentions 8086:a76e, which has been already added by 627c6db20703 ("PCI/DPC: Quirk PIO log size for Intel Raptor Lake Root Ports"). Link: https://lore.kernel.org/r/20250102164315.7562-1-tiwai@suse.de Link: https://bugzilla.suse.com/show_bug.cgi?id=1234623 Signed-off-by: Takashi Iwai [bhelgaas: commit log] Signed-off-by: Bjorn Helgaas Signed-off-by: Krzysztof Wilczyński Signed-off-by: Sasha Levin --- drivers/pci/quirks.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 76f4df75b08a1..4ed3704ce92e8 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -6253,6 +6253,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a2b, dpc_log_size); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a2d, dpc_log_size); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a2f, dpc_log_size); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a31, dpc_log_size); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0xa72f, dpc_log_size); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0xa73f, dpc_log_size); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0xa76e, dpc_log_size); #endif -- 2.39.5