From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D5CB024EF7A; Thu, 3 Apr 2025 15:26:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743693992; cv=none; b=p/8UzLftKcZtxyOGNH8ULbsxXiag18HhXqCiYsqq8hAliaCoxJj79TNoINz292rA5uvWD6maqMYQAspvLd8822edV9JfbyTUiD0128dFGIct6t6MwQn095akzW9KmexKRtmpiMtm0x8VnmNTf1z3rUsqTLXjo6uE4UnTduvptWw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743693992; c=relaxed/simple; bh=G1XRTrEMGntnNfoKZku0CH5jH1S/5jfbjBXTuJy9jg8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=P/Ucloxiq/RP6SKIl+nHPn7YnsnhCvvlmm30PRM2c8zNtVTFU4rkwHSYC2lGGEwIe9Da3IXPRtEF6njD9J8IzCLpHKRwT4YJmWvoh/t8Jwa77stLsBlyrxyKvldWfg0zUTzWcgrpQ6U7tpMNGXkrK2EsJtZ0yHM2RqgOq8Mh7H0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=obLlXEu0; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="obLlXEu0" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 07680C4CEE3; Thu, 3 Apr 2025 15:26:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1743693992; bh=G1XRTrEMGntnNfoKZku0CH5jH1S/5jfbjBXTuJy9jg8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=obLlXEu0/QQFR5ducrmqxV8QMwmi/kSgo40e/30jzIFnr5sAMb50GvKMAcmflDI4g 7s8W4/xJQ00illxnxkXZ0mcl6Y2P27Mu9lcFCpUq0WIeVgKr3h9n4qFkou2fn0v9Ra 8ppfuFEn1iBwAP1nmA2XqttKwiHLFSDgJ0jTJmAc= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, =?UTF-8?q?Cs=C3=B3k=C3=A1s=20Bence?= , William Breathitt Gray Subject: [PATCH 6.6 17/26] counter: microchip-tcb-capture: Fix undefined counter channel state on probe Date: Thu, 3 Apr 2025 16:20:38 +0100 Message-ID: <20250403151622.921045116@linuxfoundation.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250403151622.415201055@linuxfoundation.org> References: <20250403151622.415201055@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 6.6-stable review patch. If anyone has any objections, please let me know. ------------------ From: William Breathitt Gray commit c0c9c73434666dc99ee156b25e7e722150bee001 upstream. Hardware initialize of the timer counter channel does not occur on probe thus leaving the Count in an undefined state until the first function_write() callback is executed. Fix this by performing the proper hardware initialization during probe. Fixes: 106b104137fd ("counter: Add microchip TCB capture counter") Reported-by: Csókás Bence Closes: https://lore.kernel.org/all/bfa70e78-3cc3-4295-820b-3925c26135cb@prolan.hu/ Link: https://lore.kernel.org/r/20250305-preset-capture-mode-microchip-tcb-capture-v1-1-632c95c6421e@kernel.org Signed-off-by: William Breathitt Gray Signed-off-by: Greg Kroah-Hartman --- drivers/counter/microchip-tcb-capture.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) --- a/drivers/counter/microchip-tcb-capture.c +++ b/drivers/counter/microchip-tcb-capture.c @@ -368,6 +368,25 @@ static int mchp_tc_probe(struct platform channel); } + /* Disable Quadrature Decoder and position measure */ + ret = regmap_update_bits(regmap, ATMEL_TC_BMR, ATMEL_TC_QDEN | ATMEL_TC_POSEN, 0); + if (ret) + return ret; + + /* Setup the period capture mode */ + ret = regmap_update_bits(regmap, ATMEL_TC_REG(priv->channel[0], CMR), + ATMEL_TC_WAVE | ATMEL_TC_ABETRG | ATMEL_TC_CMR_MASK | + ATMEL_TC_TCCLKS, + ATMEL_TC_CMR_MASK); + if (ret) + return ret; + + /* Enable clock and trigger counter */ + ret = regmap_write(regmap, ATMEL_TC_REG(priv->channel[0], CCR), + ATMEL_TC_CLKEN | ATMEL_TC_SWTRG); + if (ret) + return ret; + priv->tc_cfg = tcb_config; priv->regmap = regmap; counter->name = dev_name(&pdev->dev);