From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A74EA263899; Tue, 8 Apr 2025 11:31:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744111897; cv=none; b=IkPsFBi2mDCtjFPxgtJba0l+twddNH1QolBnzNwgTzMbHIPz/d6HMYNIL5aCfUStKIsD3c2dj5xLXcN8ovPKpvmkucMeDwDtqbP8CkLsgBfPfd4RgxNqXvnpaPLCQxA5WKwtP9FPbwlXWfKrMtx6TeXrziEWvnCKImdcybRpvxc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744111897; c=relaxed/simple; bh=jbV1YXwBkrkqaHgWdltcepCTc90qE+lUZJhnwgTDFbc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UP0/LrPdcwZ3bLr4k4hxKNiagK9ziGuaBJBFfq8YR9jDYTLtIwU92tvjMtloGmMKqVb/H/BspS3ebHV48Yj+qqu91WJgc4p5z323yMLk/CclHdAYOZnS/nq0xhUfXdKG5sDGy8wKQqhdXzdWJLyMHNs189T4wZ2QudRX/TosKLA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=o2uz1Uil; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="o2uz1Uil" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 36720C4CEE5; Tue, 8 Apr 2025 11:31:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1744111897; bh=jbV1YXwBkrkqaHgWdltcepCTc90qE+lUZJhnwgTDFbc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=o2uz1UilLtW8rhdCtLHTk1zL2qljRF56hmhNahpR0qz8LtypNP+yzXfXCie8ae8Y1 +TlIh8ddS2a666BCJ+PMwphYPfs5pvAp3S7gc1mmuk47qzg2bOXRjv/WJFq7VnBFJq U4SkLHQdKyrFw2nIy4k6A+RP5kokRKFjMdvb6X5U= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Alexandre Ghiti , Andrew Jones , Sasha Levin Subject: [PATCH 6.14 593/731] riscv: Fix set up of vector cpu hotplug callback Date: Tue, 8 Apr 2025 12:48:10 +0200 Message-ID: <20250408104928.068852890@linuxfoundation.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250408104914.247897328@linuxfoundation.org> References: <20250408104914.247897328@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.14-stable review patch. If anyone has any objections, please let me know. ------------------ From: Andrew Jones [ Upstream commit 2744ec472de31141ad354907ff98843dd6040917 ] Whether or not we have RISCV_PROBE_VECTOR_UNALIGNED_ACCESS we need to set up a cpu hotplug callback to check if we have vector at all, since, when we don't have vector, we need to set vector_misaligned_access to unsupported rather than leave it the default of unknown. Fixes: e7c9d66e313b ("RISC-V: Report vector unaligned access speed hwprobe") Reviewed-by: Alexandre Ghiti Signed-off-by: Andrew Jones Link: https://lore.kernel.org/r/20250304120014.143628-16-ajones@ventanamicro.com Signed-off-by: Alexandre Ghiti Signed-off-by: Sasha Levin --- arch/riscv/kernel/unaligned_access_speed.c | 31 +++++++++++----------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/arch/riscv/kernel/unaligned_access_speed.c b/arch/riscv/kernel/unaligned_access_speed.c index 84694a44f3da4..a42115fbdeb89 100644 --- a/arch/riscv/kernel/unaligned_access_speed.c +++ b/arch/riscv/kernel/unaligned_access_speed.c @@ -359,6 +359,20 @@ static void check_vector_unaligned_access(struct work_struct *work __always_unus __free_pages(page, MISALIGNED_BUFFER_ORDER); } +/* Measure unaligned access speed on all CPUs present at boot in parallel. */ +static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused) +{ + schedule_on_each_cpu(check_vector_unaligned_access); + + return 0; +} +#else /* CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS */ +static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused) +{ + return 0; +} +#endif + static int riscv_online_cpu_vec(unsigned int cpu) { if (!has_vector()) { @@ -366,27 +380,16 @@ static int riscv_online_cpu_vec(unsigned int cpu) return 0; } +#ifdef CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS if (per_cpu(vector_misaligned_access, cpu) != RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN) return 0; check_vector_unaligned_access_emulated(NULL); check_vector_unaligned_access(NULL); - return 0; -} - -/* Measure unaligned access speed on all CPUs present at boot in parallel. */ -static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused) -{ - schedule_on_each_cpu(check_vector_unaligned_access); +#endif return 0; } -#else /* CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS */ -static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused) -{ - return 0; -} -#endif static int __init check_unaligned_access_all_cpus(void) { @@ -412,10 +415,8 @@ static int __init check_unaligned_access_all_cpus(void) cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "riscv:online", riscv_online_cpu, riscv_offline_cpu); #endif -#ifdef CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "riscv:online", riscv_online_cpu_vec, NULL); -#endif return 0; } -- 2.39.5