From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6843614A4C7; Wed, 7 May 2025 18:44:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746643446; cv=none; b=Y4FoV9wK8nVOG9t3eu5DLo+VOWOhZm7E7OYvxq7D2e7jdC9niMzmh8WggLdQXWagvKgjaDBXf8xyTUUtwd4+G2GVEaBradocXhff29Vq0z1QtUi9/2HiALR+9SVEVNuZQ4aGV2o5t2+sjb/kDWgu479y+OYnw1ISHkT/DP+cpzc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746643446; c=relaxed/simple; bh=KfhF7NH4/drislHC+iqJZWmRCjx9njF0uSK4lUvbCRI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Cz4NU2ZCA2OzWgoBTjDp4T9eN7J95qiPHZ7Ra/6fqrYdk1cMOQa5x+JTTk2uq36ZK5FwEBlk0aWAg6gHSD38WCjWLajfp7DbFeu9/lfIsdbylEuI7FIbdmaycnIGfMWfxrOATcIMXDPX+Oby8uK95m7usmcOY3tTAuvhDmbfxIs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=B5GETYPN; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="B5GETYPN" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E4E3FC4CEE2; Wed, 7 May 2025 18:44:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1746643446; bh=KfhF7NH4/drislHC+iqJZWmRCjx9njF0uSK4lUvbCRI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=B5GETYPNaEL8P3FLXYORSRzioQZiZWfar+bXFMJJkr2Ga+hYeiNxq3r/0jHu4haTp 3mVU/Nln+9w+eP7fbxt6WRhHM550KFYn2SfLqXh8PeZ+k56yXUzBc5DwsWv2jsJFVn n5Thbzb+2ufrR+bkj2P/x6B6OnNA403tj/xyceL4= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Shruti Parab , Kalesh AP , Andy Gospodarek , Michael Chan , "David S. Miller" , Sasha Levin Subject: [PATCH 5.15 33/55] bnxt_en: Fix ethtool -d byte order for 32-bit values Date: Wed, 7 May 2025 20:39:34 +0200 Message-ID: <20250507183800.372189949@linuxfoundation.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250507183759.048732653@linuxfoundation.org> References: <20250507183759.048732653@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: Michael Chan [ Upstream commit 02e8be5a032cae0f4ca33c6053c44d83cf4acc93 ] For version 1 register dump that includes the PCIe stats, the existing code incorrectly assumes that all PCIe stats are 64-bit values. Fix it by using an array containing the starting and ending index of the 32-bit values. The loop in bnxt_get_regs() will use the array to do proper endian swap for the 32-bit values. Fixes: b5d600b027eb ("bnxt_en: Add support for 'ethtool -d'") Reviewed-by: Shruti Parab Reviewed-by: Kalesh AP Reviewed-by: Andy Gospodarek Signed-off-by: Michael Chan Signed-off-by: David S. Miller Signed-off-by: Sasha Levin --- .../net/ethernet/broadcom/bnxt/bnxt_ethtool.c | 38 ++++++++++++++++--- 1 file changed, 32 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c index 8ebc1c522a05b..ad307df8d97ba 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c @@ -1360,6 +1360,17 @@ static int bnxt_get_regs_len(struct net_device *dev) return reg_len; } +#define BNXT_PCIE_32B_ENTRY(start, end) \ + { offsetof(struct pcie_ctx_hw_stats, start), \ + offsetof(struct pcie_ctx_hw_stats, end) } + +static const struct { + u16 start; + u16 end; +} bnxt_pcie_32b_entries[] = { + BNXT_PCIE_32B_ENTRY(pcie_ltssm_histogram[0], pcie_ltssm_histogram[3]), +}; + static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *_p) { @@ -1391,12 +1402,27 @@ static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs, req->pcie_stat_host_addr = cpu_to_le64(hw_pcie_stats_addr); rc = hwrm_req_send(bp, req); if (!rc) { - __le64 *src = (__le64 *)hw_pcie_stats; - u64 *dst = (u64 *)(_p + BNXT_PXP_REG_LEN); - int i; - - for (i = 0; i < sizeof(*hw_pcie_stats) / sizeof(__le64); i++) - dst[i] = le64_to_cpu(src[i]); + u8 *dst = (u8 *)(_p + BNXT_PXP_REG_LEN); + u8 *src = (u8 *)hw_pcie_stats; + int i, j; + + for (i = 0, j = 0; i < sizeof(*hw_pcie_stats); ) { + if (i >= bnxt_pcie_32b_entries[j].start && + i <= bnxt_pcie_32b_entries[j].end) { + u32 *dst32 = (u32 *)(dst + i); + + *dst32 = le32_to_cpu(*(__le32 *)(src + i)); + i += 4; + if (i > bnxt_pcie_32b_entries[j].end && + j < ARRAY_SIZE(bnxt_pcie_32b_entries) - 1) + j++; + } else { + u64 *dst64 = (u64 *)(dst + i); + + *dst64 = le64_to_cpu(*(__le64 *)(src + i)); + i += 8; + } + } } hwrm_req_drop(bp, req); } -- 2.39.5