From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 861E6211A2A; Wed, 7 May 2025 18:49:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746643791; cv=none; b=c9rE7y7mtOsXPWTggJZJJUtpMmDN9/vugG0azW1nMpyrFjSATzrqH5klLW34E7UGIYOB2gMRrvtcltY4PHZxttDYIDNrx54MLuu44rpWKmpXlbI2dwuO+4G8A6D+own9mMARBX3XeAxsS+bs5q9+iavV6PbMqZKQItEeEnZqOtU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746643791; c=relaxed/simple; bh=JxGNxrk/PBUy3HpcHV/KXBR8MJdbuMNxDWMt9XeZPWo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=lMMjoR53L2GLG4moPOwwZgwex3ZTrsgWVs31E1w45XxMDnwA9xskMnylN/Fq+HYQajhIZ9yd5w8UAxeB/0o3e+iMVlZ3u213XTWVHNuh86jL0iZQgxVm3go7XN+UI1aIkT7eeAUwuq6KHZugGuG+KNh6TDAuGID8eQn0hicAMzs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=pKciOqbZ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="pKciOqbZ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E1D10C4CEE2; Wed, 7 May 2025 18:49:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1746643791; bh=JxGNxrk/PBUy3HpcHV/KXBR8MJdbuMNxDWMt9XeZPWo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pKciOqbZBxbqdMT1L/fJ+5uD38cX4m/rWReryjkynHkb2DvUBXHtA0V0HYzVCAH39 rMRG2v4IJIj9M0YZezfCXB3lL7Fva/yVU1LJ4NPvGdxMl7VMwF2L4MddW6rCgIqJx2 TvqvmOBwJ1/zQvxh/e6NZehEZWu3PlB53BPeOs0M= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Srinivas Pandruvada , "Rafael J. Wysocki" Subject: [PATCH 6.14 008/183] cpufreq: intel_pstate: Unchecked MSR aceess in legacy mode Date: Wed, 7 May 2025 20:37:33 +0200 Message-ID: <20250507183825.030149378@linuxfoundation.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250507183824.682671926@linuxfoundation.org> References: <20250507183824.682671926@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.14-stable review patch. If anyone has any objections, please let me know. ------------------ From: Srinivas Pandruvada commit ac4e04d9e378f5aa826c2406ad7871ae1b6a6fb9 upstream. When turbo mode is unavailable on a Skylake-X system, executing the command: # echo 1 > /sys/devices/system/cpu/intel_pstate/no_turbo results in an unchecked MSR access error: WRMSR to 0x199 (attempted to write 0x0000000100001300). This issue was reproduced on an OEM (Original Equipment Manufacturer) system and is not a common problem across all Skylake-X systems. This error occurs because the MSR 0x199 Turbo Engage Bit (bit 32) is set when turbo mode is disabled. The issue arises when intel_pstate fails to detect that turbo mode is disabled. Here intel_pstate relies on MSR_IA32_MISC_ENABLE bit 38 to determine the status of turbo mode. However, on this system, bit 38 is not set even when turbo mode is disabled. According to the Intel Software Developer's Manual (SDM), the BIOS sets this bit during platform initialization to enable or disable opportunistic processor performance operations. Logically, this bit should be set in such cases. However, the SDM also specifies that "OS and applications must use CPUID leaf 06H to detect processors with opportunistic processor performance operations enabled." Therefore, in addition to checking MSR_IA32_MISC_ENABLE bit 38, verify that CPUID.06H:EAX[1] is 0 to accurately determine if turbo mode is disabled. Fixes: 4521e1a0ce17 ("cpufreq: intel_pstate: Reflect current no_turbo state correctly") Signed-off-by: Srinivas Pandruvada Cc: All applicable Signed-off-by: Rafael J. Wysocki Signed-off-by: Greg Kroah-Hartman --- drivers/cpufreq/intel_pstate.c | 3 +++ 1 file changed, 3 insertions(+) --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -598,6 +598,9 @@ static bool turbo_is_disabled(void) { u64 misc_en; + if (!cpu_feature_enabled(X86_FEATURE_IDA)) + return true; + rdmsrl(MSR_IA32_MISC_ENABLE, misc_en); return !!(misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);