patches.lists.linux.dev archive mirror
 help / color / mirror / Atom feed
* [PATCH AUTOSEL 6.15 001/110] drm/amd/display: disable DPP RCG before DPP CLK enable
@ 2025-06-01 23:22 Sasha Levin
  2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 002/110] drm/bridge: select DRM_KMS_HELPER for AUX_BRIDGE Sasha Levin
                   ` (108 more replies)
  0 siblings, 109 replies; 117+ messages in thread
From: Sasha Levin @ 2025-06-01 23:22 UTC (permalink / raw)
  To: patches, stable
  Cc: Charlene Liu, Hansen Dsouza, Ray Wu, Daniel Wheeler, Alex Deucher,
	Sasha Levin, harry.wentland, sunpeng.li, christian.koenig,
	airlied, simona, Hansen.Dsouza, Ahmed.Ahmed, hamzamahfooz,
	aurabindo.pillai, Ovidiu.Bunea, yi-lchen, Nicholas.Susanto,
	nicholas.kazlauskas, rodrigo.siqueira, wenjing.liu, yihan.zhu,
	tjakobi, alex.hung, michael.strauss, amd-gfx, dri-devel,
	linux-kernel

From: Charlene Liu <Charlene.Liu@amd.com>

[ Upstream commit 1bcd679209420305a86833bc357d50021909edaf ]

[why]
DPP CLK enable needs to disable DPPCLK RCG first.
The DPPCLK_en in dccg should always be enabled when the corresponding
pipe is enabled.

Reviewed-by: Hansen Dsouza <hansen.dsouza@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---

Based on my analysis of both the commit message and code changes, my
answer is: **YES** This commit should be backported to stable kernel
trees for the following reasons: ## Critical Hardware Sequencing Fix The
commit addresses a fundamental hardware sequencing requirement where DPP
(Display Pipes and Planes) Root Clock Gating (RCG) must be disabled
before enabling the DPP clock. This is a critical timing constraint
that, if violated, can cause severe system issues. ## Specific Code
Evidence 1. **In `dccg35_update_dpp_dto()`**, the fix adds a crucial
sequencing step: ```c + dccg35_set_dppclk_rcg(dccg, dpp_inst, false);
REG_SET_2(DPPCLK_DTO_PARAM[dpp_inst], 0, DPPCLK0_DTO_PHASE, phase,
DPPCLK0_DTO_MODULO, modulo); dcn35_set_dppclk_enable(dccg, dpp_inst,
true); ``` This ensures RCG is disabled (false) before enabling the DPP
clock. 2. **In `dcn35_enable_plane()`**, explicit clock control is
added: ```c + /*make sure DPPCLK is on*/ +
dccg->funcs->dccg_root_gate_disable_control(dccg, dpp->inst, true); +
dpp->funcs->dpp_dppclk_control(dpp, false, true); ``` 3. **Removal of
problematic init code** in `dcn35_init_hw()`: ```c - if
(res_pool->dccg->funcs->dccg_root_gate_disable_control) { - for (i = 0;
i < res_pool->pipe_count; i++) -
res_pool->dccg->funcs->dccg_root_gate_disable_control(res_pool->dccg, i,
0); - } ``` ## Similarity to Previous Critical Fixes This commit follows
the pattern of Similar Commit #1, which also addressed clock gating
sequencing issues that could cause system hangs. The commit message
explicitly states this is needed because "DPP CLK enable needs to
disable DPPCLK RCG first." ## Impact and Risk Assessment - **Bug
Fixed**: Incorrect clock sequencing that can cause system instability -
**Scope**: Limited to DCN35 display hardware (recent AMD GPUs) -
**Complexity**: Small, focused changes with clear purpose - **Risk**:
Low risk of regression - adds proper sequencing without major
architectural changes This fix meets all criteria for stable
backporting: - Fixes a real bug affecting users (system stability) -
Small and contained changes - No new features or architectural changes -
Addresses hardware constraints that cannot be worked around The commit
should be backported to all stable kernels that include DCN35 display
support to ensure proper display functionality and system stability for
users with affected AMD GPUs.

 .../amd/display/dc/dccg/dcn35/dcn35_dccg.c    | 38 ++++++++++++-------
 .../amd/display/dc/hwss/dcn35/dcn35_hwseq.c   | 21 ++++++----
 2 files changed, 38 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c b/drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
index b363f5360818d..ad910065f463f 100644
--- a/drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
+++ b/drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
@@ -391,6 +391,7 @@ static void dccg35_set_dppclk_rcg(struct dccg *dccg,
 
 	struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
 
+
 	if (!dccg->ctx->dc->debug.root_clock_optimization.bits.dpp && enable)
 		return;
 
@@ -411,6 +412,8 @@ static void dccg35_set_dppclk_rcg(struct dccg *dccg,
 	BREAK_TO_DEBUGGER();
 		break;
 	}
+	//DC_LOG_DEBUG("%s: inst(%d) DPPCLK rcg_disable: %d\n", __func__, inst, enable ? 0 : 1);
+
 }
 
 static void dccg35_set_dpstreamclk_rcg(
@@ -1112,30 +1115,24 @@ static void dcn35_set_dppclk_enable(struct dccg *dccg,
 {
 	struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
 
+
 	switch (dpp_inst) {
 	case 0:
 		REG_UPDATE(DPPCLK_CTRL, DPPCLK0_EN, enable);
-		if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpp)
-			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK0_ROOT_GATE_DISABLE, enable);
 		break;
 	case 1:
 		REG_UPDATE(DPPCLK_CTRL, DPPCLK1_EN, enable);
-		if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpp)
-			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK1_ROOT_GATE_DISABLE, enable);
 		break;
 	case 2:
 		REG_UPDATE(DPPCLK_CTRL, DPPCLK2_EN, enable);
-		if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpp)
-			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK2_ROOT_GATE_DISABLE, enable);
 		break;
 	case 3:
 		REG_UPDATE(DPPCLK_CTRL, DPPCLK3_EN, enable);
-		if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpp)
-			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK3_ROOT_GATE_DISABLE, enable);
 		break;
 	default:
 		break;
 	}
+	//DC_LOG_DEBUG("%s: dpp_inst(%d) DPPCLK_EN = %d\n", __func__, dpp_inst, enable);
 
 }
 
@@ -1163,14 +1160,18 @@ static void dccg35_update_dpp_dto(struct dccg *dccg, int dpp_inst,
 			ASSERT(false);
 			phase = 0xff;
 		}
+		dccg35_set_dppclk_rcg(dccg, dpp_inst, false);
 
 		REG_SET_2(DPPCLK_DTO_PARAM[dpp_inst], 0,
 				DPPCLK0_DTO_PHASE, phase,
 				DPPCLK0_DTO_MODULO, modulo);
 
 		dcn35_set_dppclk_enable(dccg, dpp_inst, true);
-	} else
+	} else {
 		dcn35_set_dppclk_enable(dccg, dpp_inst, false);
+		/*we have this in hwss: disable_plane*/
+		//dccg35_set_dppclk_rcg(dccg, dpp_inst, true);
+	}
 	dccg->pipe_dppclk_khz[dpp_inst] = req_dppclk;
 }
 
@@ -1182,6 +1183,7 @@ static void dccg35_set_dppclk_root_clock_gating(struct dccg *dccg,
 	if (!dccg->ctx->dc->debug.root_clock_optimization.bits.dpp)
 		return;
 
+
 	switch (dpp_inst) {
 	case 0:
 		REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK0_ROOT_GATE_DISABLE, enable);
@@ -1198,6 +1200,8 @@ static void dccg35_set_dppclk_root_clock_gating(struct dccg *dccg,
 	default:
 		break;
 	}
+	//DC_LOG_DEBUG("%s: dpp_inst(%d) rcg: %d\n", __func__, dpp_inst, enable);
+
 }
 
 static void dccg35_get_pixel_rate_div(
@@ -1521,28 +1525,30 @@ static void dccg35_set_physymclk_root_clock_gating(
 	switch (phy_inst) {
 	case 0:
 		REG_UPDATE(DCCG_GATE_DISABLE_CNTL2,
-				PHYASYMCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);
+				PHYASYMCLK_ROOT_GATE_DISABLE, enable ? 0 : 1);
 		break;
 	case 1:
 		REG_UPDATE(DCCG_GATE_DISABLE_CNTL2,
-				PHYBSYMCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);
+				PHYBSYMCLK_ROOT_GATE_DISABLE, enable ? 0 : 1);
 		break;
 	case 2:
 		REG_UPDATE(DCCG_GATE_DISABLE_CNTL2,
-				PHYCSYMCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);
+				PHYCSYMCLK_ROOT_GATE_DISABLE, enable ? 0 : 1);
 		break;
 	case 3:
 		REG_UPDATE(DCCG_GATE_DISABLE_CNTL2,
-				PHYDSYMCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);
+				PHYDSYMCLK_ROOT_GATE_DISABLE, enable ? 0 : 1);
 		break;
 	case 4:
 		REG_UPDATE(DCCG_GATE_DISABLE_CNTL2,
-				PHYESYMCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);
+				PHYESYMCLK_ROOT_GATE_DISABLE, enable ? 0 : 1);
 		break;
 	default:
 		BREAK_TO_DEBUGGER();
 		return;
 	}
+	//DC_LOG_DEBUG("%s: dpp_inst(%d) PHYESYMCLK_ROOT_GATE_DISABLE:\n", __func__, phy_inst, enable ? 0 : 1);
+
 }
 
 static void dccg35_set_physymclk(
@@ -1643,6 +1649,8 @@ static void dccg35_dpp_root_clock_control(
 		return;
 
 	if (clock_on) {
+		dccg35_set_dppclk_rcg(dccg, dpp_inst, false);
+
 		/* turn off the DTO and leave phase/modulo at max */
 		dcn35_set_dppclk_enable(dccg, dpp_inst, 1);
 		REG_SET_2(DPPCLK_DTO_PARAM[dpp_inst], 0,
@@ -1654,6 +1662,8 @@ static void dccg35_dpp_root_clock_control(
 		REG_SET_2(DPPCLK_DTO_PARAM[dpp_inst], 0,
 			  DPPCLK0_DTO_PHASE, 0,
 			  DPPCLK0_DTO_MODULO, 1);
+		/*we have this in hwss: disable_plane*/
+		//dccg35_set_dppclk_rcg(dccg, dpp_inst, true);
 	}
 
 	dccg->dpp_clock_gated[dpp_inst] = !clock_on;
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
index 922b8d71cf1aa..63077c1fad859 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
@@ -241,11 +241,6 @@ void dcn35_init_hw(struct dc *dc)
 			dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub,
 					!dc->res_pool->hubbub->ctx->dc->debug.disable_stutter);
 	}
-	if (res_pool->dccg->funcs->dccg_root_gate_disable_control) {
-		for (i = 0; i < res_pool->pipe_count; i++)
-			res_pool->dccg->funcs->dccg_root_gate_disable_control(res_pool->dccg, i, 0);
-	}
-
 	for (i = 0; i < res_pool->audio_count; i++) {
 		struct audio *audio = res_pool->audios[i];
 
@@ -901,12 +896,18 @@ void dcn35_init_pipes(struct dc *dc, struct dc_state *context)
 void dcn35_enable_plane(struct dc *dc, struct pipe_ctx *pipe_ctx,
 			       struct dc_state *context)
 {
+	struct dpp *dpp = pipe_ctx->plane_res.dpp;
+	struct dccg *dccg = dc->res_pool->dccg;
+
+
 	/* enable DCFCLK current DCHUB */
 	pipe_ctx->plane_res.hubp->funcs->hubp_clk_cntl(pipe_ctx->plane_res.hubp, true);
 
 	/* initialize HUBP on power up */
 	pipe_ctx->plane_res.hubp->funcs->hubp_init(pipe_ctx->plane_res.hubp);
-
+	/*make sure DPPCLK is on*/
+	dccg->funcs->dccg_root_gate_disable_control(dccg, dpp->inst, true);
+	dpp->funcs->dpp_dppclk_control(dpp, false, true);
 	/* make sure OPP_PIPE_CLOCK_EN = 1 */
 	pipe_ctx->stream_res.opp->funcs->opp_pipe_clock_control(
 			pipe_ctx->stream_res.opp,
@@ -923,6 +924,7 @@ void dcn35_enable_plane(struct dc *dc, struct pipe_ctx *pipe_ctx,
 		// Program system aperture settings
 		pipe_ctx->plane_res.hubp->funcs->hubp_set_vm_system_aperture_settings(pipe_ctx->plane_res.hubp, &apt);
 	}
+	//DC_LOG_DEBUG("%s: dpp_inst(%d) =\n", __func__, dpp->inst);
 
 	if (!pipe_ctx->top_pipe
 		&& pipe_ctx->plane_state
@@ -938,6 +940,8 @@ void dcn35_plane_atomic_disable(struct dc *dc, struct pipe_ctx *pipe_ctx)
 {
 	struct hubp *hubp = pipe_ctx->plane_res.hubp;
 	struct dpp *dpp = pipe_ctx->plane_res.dpp;
+	struct dccg *dccg = dc->res_pool->dccg;
+
 
 	dc->hwss.wait_for_mpcc_disconnect(dc, dc->res_pool, pipe_ctx);
 
@@ -955,7 +959,8 @@ void dcn35_plane_atomic_disable(struct dc *dc, struct pipe_ctx *pipe_ctx)
 	hubp->funcs->hubp_clk_cntl(hubp, false);
 
 	dpp->funcs->dpp_dppclk_control(dpp, false, false);
-/*to do, need to support both case*/
+	dccg->funcs->dccg_root_gate_disable_control(dccg, dpp->inst, false);
+
 	hubp->power_gated = true;
 
 	hubp->funcs->hubp_reset(hubp);
@@ -967,6 +972,8 @@ void dcn35_plane_atomic_disable(struct dc *dc, struct pipe_ctx *pipe_ctx)
 	pipe_ctx->top_pipe = NULL;
 	pipe_ctx->bottom_pipe = NULL;
 	pipe_ctx->plane_state = NULL;
+	//DC_LOG_DEBUG("%s: dpp_inst(%d)=\n", __func__, dpp->inst);
+
 }
 
 void dcn35_disable_plane(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx)
-- 
2.39.5


^ permalink raw reply related	[flat|nested] 117+ messages in thread

end of thread, other threads:[~2025-06-18 16:19 UTC | newest]

Thread overview: 117+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-06-01 23:22 [PATCH AUTOSEL 6.15 001/110] drm/amd/display: disable DPP RCG before DPP CLK enable Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 002/110] drm/bridge: select DRM_KMS_HELPER for AUX_BRIDGE Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 003/110] drm/amdgpu/gfx6: fix CSIB handling Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 004/110] media: imx-jpeg: Check decoding is ongoing for motion-jpeg Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 005/110] drm/rockchip: inno-hdmi: Fix video timing HSYNC/VSYNC polarity setting for rk3036 Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 006/110] drm/dp: add option to disable zero sized address only transactions Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 007/110] sunrpc: update nextcheck time when adding new cache entries Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 008/110] drm/amdgpu: Fix API status offset for MES queue reset Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 009/110] drm/amd/display: DCN32 null data check Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 010/110] drm/xe: Fix CFI violation when accessing sysfs files Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 011/110] drm/bridge: analogix_dp: Add irq flag IRQF_NO_AUTOEN instead of calling disable_irq() Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 012/110] workqueue: Fix race condition in wq->stats incrementation Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 013/110] drm/panel/sharp-ls043t1le01: Use _multi variants Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 014/110] exfat: fix double free in delayed_free Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 015/110] drm/bridge: anx7625: enable HPD interrupts Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 016/110] arm64/cpuinfo: only show one cpu's info in c_show() Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 017/110] drm/panthor: Don't update MMU_INT_MASK in panthor_mmu_irq_handler() Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 018/110] drm/bridge: anx7625: change the gpiod_set_value API Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 019/110] exfat: do not clear volume dirty flag during sync Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 020/110] drm/amdkfd: Drop workaround for GC v9.4.3 revID 0 Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 021/110] drm/amdgpu/gfx11: fix CSIB handling Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 022/110] media: nuvoton: npcm-video: Fix stuck due to no video signal error Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 023/110] drm/nouveau: fix hibernate on disabled GPU Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 024/110] media: i2c: imx334: Enable runtime PM before sub-device registration Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 025/110] drm/amd/display: Avoid divide by zero by initializing dummy pitch to 1 Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 026/110] drm/nouveau/gsp: fix rm shutdown wait condition Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 027/110] drm/msm/hdmi: add runtime PM calls to DDC transfer function Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 028/110] media: uapi: v4l: Fix V4L2_TYPE_IS_OUTPUT condition Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 029/110] drm/amd/display: Add NULL pointer checks in dm_force_atomic_commit() Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 030/110] media: verisilicon: Enable wide 4K in AV1 decoder Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 031/110] drm/amd/display: Skip to enable dsc if it has been off Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 032/110] drm/amdgpu: Add basic validation for RAS header Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 033/110] dlm: use SHUT_RDWR for SCTP shutdown Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 034/110] drm/msm/a6xx: Increase HFI response timeout Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 035/110] drm/amd/display: Do Not Consider DSC if Valid Config Not Found Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 036/110] media: i2c: imx334: Fix runtime PM handling in remove function Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 037/110] drm/amdgpu/gfx10: fix CSIB handling Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 038/110] drm: panel-orientation-quirks: Add ZOTAC Gaming Zone Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 039/110] media: ccs-pll: Better validate VT PLL branch Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 040/110] media: uapi: v4l: Change V4L2_TYPE_IS_CAPTURE condition Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 041/110] drm/amd/display: fix zero value for APU watermark_c Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 042/110] drm/ttm/tests: fix incorrect assert in ttm_bo_unreserve_bulk() Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 043/110] drm/amdgpu/gfx7: fix CSIB handling Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 044/110] drm/xe: Use copy_from_user() instead of __copy_from_user() Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 045/110] ext4: ext4: unify EXT4_EX_NOCACHE|NOFAIL flags in ext4_ext_remove_space() Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 046/110] jfs: fix array-index-out-of-bounds read in add_missing_indices Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 047/110] media: ti: cal: Fix wrong goto on error path Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 048/110] drm/xe/vf: Fix guc_info debugfs for VFs Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 049/110] drm/amd/display: Update IPS sequential_ono requirement checks Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 050/110] drm/amd/display: Correct SSC enable detection for DCN351 Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 051/110] drm/amd/display: Fix Vertical Interrupt definitions for dcn32, dcn401 Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 052/110] media: rkvdec: h264: Use bytesperline and buffer height as virstride Sasha Levin
2025-06-02  5:31   ` Greg KH
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 053/110] media: cec: extron-da-hd-4k-plus: Fix Wformat-truncation Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 054/110] media: rkvdec: Initialize the m2m context before the controls Sasha Levin
2025-06-02 13:00   ` Nicolas Dufresne
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 055/110] drm/amdgpu: fix MES GFX mask Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 056/110] drm/amdgpu: Disallow partition query during reset Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 057/110] sunrpc: fix race in cache cleanup causing stale nextcheck time Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 058/110] ext4: prevent stale extent cache entries caused by concurrent get es_cache Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 059/110] drm/amdgpu/gfx8: fix CSIB handling Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 060/110] drm/amd/display: disable EASF narrow filter sharpening Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 061/110] drm/amdgpu/gfx9: fix CSIB handling Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 062/110] drm/amd/display: Fix VUpdate offset calculations for dcn401 Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 063/110] jfs: Fix null-ptr-deref in jfs_ioc_trim Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 064/110] drm/amd/pm: Reset SMU v13.0.x custom settings Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 065/110] drm/amd/display: Correct prefetch calculation Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 066/110] drm/amd/display: Restructure DMI quirks Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 067/110] media: renesas: vsp1: Fix media bus code setup on RWPF source pad Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 068/110] drm/msm/dpu: don't select single flush for active CTL blocks Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 069/110] drm/amdkfd: Set SDMA_RLCx_IB_CNTL/SWITCH_INSIDE_IB Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 070/110] media: tc358743: ignore video while HPD is low Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 071/110] media: platform: exynos4-is: Add hardware sync wait to fimc_is_hw_change_mode() Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 072/110] media: i2c: imx334: update mode_3840x2160_regs array Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 073/110] nios2: force update_mmu_cache on spurious tlb-permission--related pagefaults Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 074/110] media: rcar-vin: Fix stride setting for RAW8 formats Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 075/110] drm/rockchip: vop2: Make overlay layer select register configuration take effect by vsync Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 076/110] drm/amdgpu: Add indirect L1_TLB_CNTL reg programming for VFs Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 077/110] drm/xe/uc: Remove static from loop variable Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 078/110] media: qcom: venus: Fix uninitialized variable warning Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 079/110] drm/panel: simple: Add POWERTIP PH128800T004-ZZA01 panel entry Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 080/110] Make 'cc-option' work correctly for the -Wno-xyzzy pattern Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 081/110] ACPI: bus: Bail out if acpi_kobj registration fails Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 082/110] selftests: harness: Mark functions without prototypes static Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 083/110] pmdomain: ti: Fix STANDBY handling of PER power domain Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 084/110] PM: runtime: fix denying of auto suspend in pm_suspend_timer_fn() Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 085/110] ASoC: amd: yc: Add quirk for Lenovo Yoga Pro 7 14ASP9 Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 086/110] thermal/drivers/qcom/tsens: Update conditions to strictly evaluate for IP v2+ Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 087/110] clocksource/drivers/timer-tegra186: Fix watchdog self-pinging Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 088/110] ALSA: hda/realtek: Add support for Acer Helios Laptops using CS35L41 HDA Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 089/110] gpio: pxa: Make irq_chip immutable Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 090/110] gpio: grgpio: " Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 091/110] gpio: xgene-sb: " Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 092/110] genirq: Retain disable depth for managed interrupts across CPU hotplug Sasha Levin
2025-06-06 12:32   ` Johan Hovold
2025-06-18 15:11     ` Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 093/110] mmc: sdhci-esdhc-imx: reset async FIFO before sending manual tuning command Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 094/110] mmc: sdhci-esdhc-imx: Save tuning value when card stays powered in suspend Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 095/110] mmc: Add quirk to disable DDR50 tuning Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 096/110] ASoC: intel/sdw_utils: Assign initial value in asoc_sdw_rt_amp_spk_rtd_init() Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 097/110] clocksource: Fix the CPUs' choice in the watchdog per CPU verification Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 098/110] ACPICA: Avoid sequence overread in call to strncmp() Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 099/110] ACPICA: utilities: Fix overflow check in vsnprintf() Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 100/110] ACPI: EC: Add device to acpi_ec_no_wakeup[] qurik list Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 101/110] ALSA: seq: Remove unused snd_seq_queue_client_leave_cells Sasha Levin
2025-06-01 23:51   ` Dr. David Alan Gilbert
2025-06-18 15:12     ` Sasha Levin
2025-06-18 16:19       ` Dr. David Alan Gilbert
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 102/110] spi: axi-spi-engine: wait for completion in setup Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 103/110] cpufreq: Force sync policy boost with global boost on sysfs update Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 104/110] power: supply: bq27xxx: Retrieve again when busy Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 105/110] pmdomain: core: Reset genpd->states to avoid freeing invalid data Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 106/110] tools/nolibc: use intmax definitions from compiler Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 107/110] EDAC/igen6: Skip absent memory controllers Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 108/110] gpio: ds4520: don't check the 'ngpios' property in the driver Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 109/110] ASoC: simple-card-utils: fixup dlc->xxx handling for error case Sasha Levin
2025-06-01 23:24 ` [PATCH AUTOSEL 6.15 110/110] ASoC: tas2770: Power cycle amp on ISENSE/VSENSE change Sasha Levin

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).