From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6B5A3312803; Tue, 26 Aug 2025 11:43:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756208582; cv=none; b=ElXrTnFcbsw9Zj1FPJqHMX8uUAjpveZKuRcZorXSFw94T6ssqeWmxK93PoxiyRjC8beBhWGzt04MOEEVdIsR2nVUvmDq7IBA9dmJGW8xnZ9tdsloiyF9x7bjux3AsHPx8qHngFC8bN+UKEo8r1Aj0L1o1FBxutQfEFymlyYPpag= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756208582; c=relaxed/simple; bh=GpAIaiwyQn0Qi9LSIM/VgHnRrb2LgfrMhOiQ3Kh8GR4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YWB1NtsbzdPEDC3TCLQazX/rwLYe9TaFDCplvkuiRDaaaE/ddBjwAWGZUj6Zpv7MIvK0zhVwSGn95+M2t9+FqlvIPIQjNcNkJBwX+0wR4nEslPLoEjhn6pIvzzKhchmlfY67pRC6CmRDPMJT3qmybGYr+GuZoCPo4ygiD9XGfuQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=esI3jGBv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="esI3jGBv" Received: by smtp.kernel.org (Postfix) with ESMTPSA id F2347C4CEF1; Tue, 26 Aug 2025 11:43:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1756208582; bh=GpAIaiwyQn0Qi9LSIM/VgHnRrb2LgfrMhOiQ3Kh8GR4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=esI3jGBvO4trLIRLYNKQM+Z0gv9r8FSW4IxJJUndMLSzWs68+YetNbokWlAuDFKak K0123Qytqq1ueMalsx5L1+dFUstZ0vEzYhEBwSVx+wH7iGey8VBgehLKCrAHxknKN1 lzG0DGKglbY8hCMZn2QLxsf8K+ryECECLHHSszjE= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Victor Shih , Adrian Hunter , Ulf Hansson Subject: [PATCH 6.12 166/322] mmc: sdhci-pci-gli: Add a new function to simplify the code Date: Tue, 26 Aug 2025 13:09:41 +0200 Message-ID: <20250826110919.932266625@linuxfoundation.org> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250826110915.169062587@linuxfoundation.org> References: <20250826110915.169062587@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.12-stable review patch. If anyone has any objections, please let me know. ------------------ From: Victor Shih commit dec8b38be4b35cae5f7fa086daf2631e2cfa09c1 upstream. In preparation to fix replay timer timeout, add sdhci_gli_mask_replay_timer_timeout() function to simplify some of the code, allowing it to be re-used. Signed-off-by: Victor Shih Fixes: 1ae1d2d6e555 ("mmc: sdhci-pci-gli: Add Genesys Logic GL9763E support") Cc: stable@vger.kernel.org Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20250731065752.450231-2-victorshihgli@gmail.com Signed-off-by: Ulf Hansson Signed-off-by: Greg Kroah-Hartman --- drivers/mmc/host/sdhci-pci-gli.c | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) --- a/drivers/mmc/host/sdhci-pci-gli.c +++ b/drivers/mmc/host/sdhci-pci-gli.c @@ -215,6 +215,20 @@ #define GLI_MAX_TUNING_LOOP 40 /* Genesys Logic chipset */ +static void sdhci_gli_mask_replay_timer_timeout(struct pci_dev *pdev) +{ + int aer; + u32 value; + + /* mask the replay timer timeout of AER */ + aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); + if (aer) { + pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value); + value |= PCI_ERR_COR_REP_TIMER; + pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value); + } +} + static inline void gl9750_wt_on(struct sdhci_host *host) { u32 wt_value; @@ -535,7 +549,6 @@ static void gl9750_hw_setting(struct sdh { struct sdhci_pci_slot *slot = sdhci_priv(host); struct pci_dev *pdev; - int aer; u32 value; pdev = slot->chip->pdev; @@ -554,12 +567,7 @@ static void gl9750_hw_setting(struct sdh pci_set_power_state(pdev, PCI_D0); /* mask the replay timer timeout of AER */ - aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); - if (aer) { - pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value); - value |= PCI_ERR_COR_REP_TIMER; - pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value); - } + sdhci_gli_mask_replay_timer_timeout(pdev); gl9750_wt_off(host); } @@ -734,7 +742,6 @@ static void sdhci_gl9755_set_clock(struc static void gl9755_hw_setting(struct sdhci_pci_slot *slot) { struct pci_dev *pdev = slot->chip->pdev; - int aer; u32 value; gl9755_wt_on(pdev); @@ -769,12 +776,7 @@ static void gl9755_hw_setting(struct sdh pci_set_power_state(pdev, PCI_D0); /* mask the replay timer timeout of AER */ - aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); - if (aer) { - pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value); - value |= PCI_ERR_COR_REP_TIMER; - pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value); - } + sdhci_gli_mask_replay_timer_timeout(pdev); gl9755_wt_off(pdev); }