From: Simon Horman <horms@kernel.org>
To: Tariq Toukan <tariqt@nvidia.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Saeed Mahameed <saeedm@nvidia.com>,
Leon Romanovsky <leon@kernel.org>, Mark Bloch <mbloch@nvidia.com>,
netdev@vger.kernel.org, linux-rdma@vger.kernel.org,
linux-kernel@vger.kernel.org, Gal Pressman <gal@nvidia.com>,
Leon Romanovsky <leonro@nvidia.com>,
Jason Gunthorpe <jgg@nvidia.com>,
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Moshe Shemesh <moshe@nvidia.com>, Will Deacon <will@kernel.org>,
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Mark Rutland <mark.rutland@arm.com>,
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Jijie Shao <shaojijie@huawei.com>,
Patrisious Haddad <phaddad@nvidia.com>
Subject: Re: [PATCH net-next V3] net/mlx5: Improve write-combining test reliability for ARM64 Grace CPUs
Date: Thu, 18 Sep 2025 16:07:27 +0100 [thread overview]
Message-ID: <20250918150727.GX394836@horms.kernel.org> (raw)
In-Reply-To: <1758178883-648295-1-git-send-email-tariqt@nvidia.com>
On Thu, Sep 18, 2025 at 10:01:23AM +0300, Tariq Toukan wrote:
> From: Patrisious Haddad <phaddad@nvidia.com>
>
> Write combining is an optimization feature in CPUs that is frequently
> used by modern devices to generate 32 or 64 byte TLPs at the PCIe level.
> These large TLPs allow certain optimizations in the driver to HW
> communication that improve performance. As WC is unpredictable and
> optional the HW designs all tolerate cases where combining doesn't
> happen and simply experience a performance degradation.
...
> Signed-off-by: Patrisious Haddad <phaddad@nvidia.com>
> Reviewed-by: Michael Guralnik <michaelgur@nvidia.com>
> Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
> Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
> ---
> drivers/net/ethernet/mellanox/mlx5/core/wc.c | 28 ++++++++++++++++++--
> 1 file changed, 26 insertions(+), 2 deletions(-)
>
> Find V2 here:
> https://lore.kernel.org/all/1757925308-614943-1-git-send-email-tariqt@nvidia.com/
>
> V3:
> - Move the new copy assembly code to be inline, within the same file it
> is used.
> - Use ".arch_extension simd;\n\t" to avoid the need for separate file
> and special compilation flags.
Hi Tariq, Patrisious, all,
This is not a full review - although I've been following this patch with
much interest, I don't feel qualified to provide one.
But what I can do is be the poor soul to report that unfortunately
the patch doesn't compile against net-next. So at some point it will
need to be rebased and reposted.
Thanks for your persistence on working on this, it is indeed a nettlesome issue.
--
pw-bot: changes-requested
prev parent reply other threads:[~2025-09-18 15:07 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-18 7:01 [PATCH net-next V3] net/mlx5: Improve write-combining test reliability for ARM64 Grace CPUs Tariq Toukan
2025-09-18 15:07 ` Simon Horman [this message]
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