Re: [PATCH rfcv2 7/8] iommu/arm-smmu-v3: Add arm_smmu_invs based arm_smmu_domain_inv_range()

[Jason Gunthorpe <jgg@nvidia.com>]

On Mon, Sep 08, 2025 at 04:27:01PM -0700, Nicolin Chen wrote:

Maybe:

Each smmu_domain now has an arm_smmu_invs that specifies the
invalidation steps to perform after any change the ioptes. This
includes basic ASID/VMID, the special case for nesting, and ATS.

Introduce a new arm_smmu_domain_inv helper iterating smmu_domain->invs,
to convert the invalidation array to commands. Any invalidation request
with no size specified means an entire flush over a range based one.

Take advantage of the sorted list to compatible batch same-SMMU
operations together. For instance ATS invaliations for multiple SIDs
can be pushed as a batch.

ATS invalidations must be completed before the driver disables ATS or
the device is permitted to ignore the racing invalidation and cause a
SMMU timeout. This sequencing is done with a rwlock where holding the
write side of the rwlock means there are no outstanding ATS
invalidations. If ATS is not used the rwlock is ignored, similar to
the existing code.

> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> index e4e0e066108cc..c73a94514c6d6 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> @@ -675,9 +675,15 @@ struct arm_smmu_inv {
>  	refcount_t users; /* users=0 to mark as a trash to be purged */
>  };
>  
> +static inline bool arm_smmu_inv_is_ats(struct arm_smmu_inv *inv)
> +{
> +	return inv->type == INV_TYPE_ATS || inv->type == INV_TYPE_ATS_FULL;
> +}

I would put these has_ats related infrastructure hunks in the first
patch adding arm_smmu_invs

Jason