From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5B9771C6FE1; Tue, 11 Nov 2025 00:59:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762822793; cv=none; b=FpirsydMyfYOB4HjrI1XX3JqhLbMqMzNOw8TEEGssf2gfRuL2Y5xcken6f9XraJ8jNDlJnbm9qM+s+kkxCy+uQlSkzdBLvJc7DnqXMPlh1nUt0qFR/uPe+wmLqw1laNsjBGCyHf3rCxZ61/Iubd4JF/iHnoXwcwXDEZtMpxVdSU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762822793; c=relaxed/simple; bh=XLxeyBb3ob5n6uMxpLzwrPldudSq6jTlLNuTgy5JW9A=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qCGlq4V+68Gt1Dfyi9VQwOjpX3uNQVMz/iREcsNecsXkfFXU3G71BxGu3Jg0CnFOu2NBVBGEGgWdNsukR+sEWP7VjtG0cj1UQFOr2+tCzetHoO5l9D7vVBuzNqqSW8bInEHDlc5fOsERRN20Z3IAM2QWrMdZzKE1/psXZY4Qctw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=XwIl9zoF; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="XwIl9zoF" Received: by smtp.kernel.org (Postfix) with ESMTPSA id CBFCCC116B1; Tue, 11 Nov 2025 00:59:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1762822793; bh=XLxeyBb3ob5n6uMxpLzwrPldudSq6jTlLNuTgy5JW9A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XwIl9zoFNNDU4JaLYIWGYgQEb5Y+eHKNCGC+pFNBjgiEpInfWI/NTh7I6Bz+TJDlf L2yWa8JXiZjEDTugsP4uHJoO5RWOJNhTLCeLVdQDvg0w17xFVnrVv8sY+rCGerdP2c 0pzWaYWLbHFhgYr6Frw5lLBGaOjhhWedZK20Gcog= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Christian Bruel , Thomas Gleixner , Marc Zyngier , Sasha Levin Subject: [PATCH 6.12 110/565] irqchip/gic-v2m: Handle Multiple MSI base IRQ Alignment Date: Tue, 11 Nov 2025 09:39:26 +0900 Message-ID: <20251111004529.432750860@linuxfoundation.org> X-Mailer: git-send-email 2.51.2 In-Reply-To: <20251111004526.816196597@linuxfoundation.org> References: <20251111004526.816196597@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.12-stable review patch. If anyone has any objections, please let me know. ------------------ From: Christian Bruel [ Upstream commit 2ef3886ce626dcdab0cbc452dbbebc19f57133d8 ] The PCI Local Bus Specification 3.0 (section 6.8.1.6) allows modifying the low-order bits of the MSI Message DATA register to encode nr_irqs interrupt numbers in the log2(nr_irqs) bits for the domain. The problem arises if the base vector (GICV2m base spi) is not aligned with nr_irqs; in this case, the low-order log2(nr_irqs) bits from the base vector conflict with the nr_irqs masking, causing the wrong MSI interrupt to be identified. To fix this, use bitmap_find_next_zero_area_off() instead of bitmap_find_free_region() to align the initial base vector with nr_irqs. Signed-off-by: Christian Bruel Signed-off-by: Thomas Gleixner Reviewed-by: Marc Zyngier Link: https://lore.kernel.org/all/20250902091045.220847-1-christian.bruel@foss.st.com Signed-off-by: Sasha Levin --- drivers/irqchip/irq-gic-v2m.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c index a1e370d0200f1..b5479c552b776 100644 --- a/drivers/irqchip/irq-gic-v2m.c +++ b/drivers/irqchip/irq-gic-v2m.c @@ -156,14 +156,19 @@ static int gicv2m_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, { msi_alloc_info_t *info = args; struct v2m_data *v2m = NULL, *tmp; - int hwirq, offset, i, err = 0; + int hwirq, i, err = 0; + unsigned long offset; + unsigned long align_mask = nr_irqs - 1; spin_lock(&v2m_lock); list_for_each_entry(tmp, &v2m_nodes, entry) { - offset = bitmap_find_free_region(tmp->bm, tmp->nr_spis, - get_count_order(nr_irqs)); - if (offset >= 0) { + unsigned long align_off = tmp->spi_start - (tmp->spi_start & ~align_mask); + + offset = bitmap_find_next_zero_area_off(tmp->bm, tmp->nr_spis, 0, + nr_irqs, align_mask, align_off); + if (offset < tmp->nr_spis) { v2m = tmp; + bitmap_set(v2m->bm, offset, nr_irqs); break; } } -- 2.51.0