From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9E0C5263F52; Tue, 11 Nov 2025 01:13:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762823608; cv=none; b=rLbZqDYHWv4uLH7iguuY0J+wehLm/g2NUu/EFHCc0jwa5srP5Z4HMsoA8YEdWnSbND4c2ZN5SbCcxspRxnwp+F/bbEEJrnE1HPYk0+ng3ryKcRpla8LiKAzUiIwU1G6uB0vIYGPMcHO3j32a0uQuIrB4UbXLl7xyU9/K5Z//1TU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762823608; c=relaxed/simple; bh=wauE9aZTGxd/FkJuO4pvuzvmBp0eGXz5ZMkzjHnGi4s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FNguCjUX0QfyVtgKUbrjiAKJ+VRI+pwnXebs6qm97HAaN2TgfIhklsVWD2BiLRlmWhYCgfWF8vL2DUFiFYzFBroj7ic8rTzIr4lBe9Oe+jCGNmXmZHf8FS6katZUnDB/qYMWvdFzJe//91xz13OTIB9HuiDaOcXCP9fpS+CcY5U= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=1+w5OPXm; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="1+w5OPXm" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 35832C4CEF5; Tue, 11 Nov 2025 01:13:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1762823608; bh=wauE9aZTGxd/FkJuO4pvuzvmBp0eGXz5ZMkzjHnGi4s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=1+w5OPXmybj1T+ZIP5tWvZq68HtXoy7eoQ6DoNlO84dIfdjOOjEX1OjZcFV4R/IN5 CQJrIrV6A1naCPe9MWTyuWrs/YsCANMR13uQZo3THcm4UPhobD6yXiPZu4tnPl43sB PZgs1yVttbyheJU7Aa+QScqEN5DtEBBbdtvpYMuw= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Dmitry Baryshkov , Krzysztof Kozlowski , Sasha Levin Subject: [PATCH 6.12 285/565] drm/msm/dsi/phy_7nm: Fix missing initial VCO rate Date: Tue, 11 Nov 2025 09:42:21 +0900 Message-ID: <20251111004533.289985963@linuxfoundation.org> X-Mailer: git-send-email 2.51.2 In-Reply-To: <20251111004526.816196597@linuxfoundation.org> References: <20251111004526.816196597@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.12-stable review patch. If anyone has any objections, please let me know. ------------------ From: Krzysztof Kozlowski [ Upstream commit 5ddcb0cb9d10e6e70a68e0cb8f0b8e3a7eb8ccaf ] Driver unconditionally saves current state on first init in dsi_pll_7nm_init(), but does not save the VCO rate, only some of the divider registers. The state is then restored during probe/enable via msm_dsi_phy_enable() -> msm_dsi_phy_pll_restore_state() -> dsi_7nm_pll_restore_state(). Restoring calls dsi_pll_7nm_vco_set_rate() with pll_7nm->vco_current_rate=0, which basically overwrites existing rate of VCO and messes with clock hierarchy, by setting frequency to 0 to clock tree. This makes anyway little sense - VCO rate was not saved, so should not be restored. If PLL was not configured configure it to minimum rate to avoid glitches and configuring entire in clock hierarchy to 0 Hz. Reviewed-by: Dmitry Baryshkov Signed-off-by: Krzysztof Kozlowski Patchwork: https://patchwork.freedesktop.org/patch/657827/ Link: https://lore.kernel.org/r/20250610-b4-sm8750-display-v6-9-ee633e3ddbff@linaro.org Signed-off-by: Dmitry Baryshkov Signed-off-by: Sasha Levin --- drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c index ec5aa8cb37d9a..0f8440fa73b4a 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c @@ -814,6 +814,12 @@ static int dsi_pll_7nm_init(struct msm_dsi_phy *phy) /* TODO: Remove this when we have proper display handover support */ msm_dsi_phy_pll_save_state(phy); + /* + * Store also proper vco_current_rate, because its value will be used in + * dsi_7nm_pll_restore_state(). + */ + if (!dsi_pll_7nm_vco_recalc_rate(&pll_7nm->clk_hw, VCO_REF_CLK_RATE)) + pll_7nm->vco_current_rate = pll_7nm->phy->cfg->min_pll_rate; return 0; } -- 2.51.0