From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 42C8234041C; Wed, 20 May 2026 16:48:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779295691; cv=none; b=MtMO9yXeRPuGjOVFMWwNmQKobm/o7bMe7a3n2gdRQVjfywOyR1tB64MZJyllfxU8rpik7Q3K8tx5RPiFdckZdrkx8tcquW1RCMEXub5RQ3DhsPb56Rj3K84NbntDYNeXM9wZ05LVFgcx7roA+T5NamyQQuJGF2i1E/9Bk3lYAZ0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779295691; c=relaxed/simple; bh=ebGpyrEbcTG97OEuCA2+wL48u2GWnaCgwYxWrXiJrfc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Tw5MZqubeXW7NbNlz5F6dofOVq+NW0ADAu0B40it5MI4wu5Oqyf/Ucayc2QKjYYc9/Eb1mrsbA56iBd6m+BCcBJMc6On0I82nDADA0QSi/ReSrglCGJ5mjbxISCxmG8NFIbfHU+hpMySjFRppBW6Wboa4SDcizd4C0RXTD3GjHI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=mYbhRO+1; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="mYbhRO+1" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5F75C1F00893; Wed, 20 May 2026 16:48:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1779295689; bh=qhVSy+QBPhYEo3QoL4saKz4sAcqBuJl9UidJ5l0cQHI=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=mYbhRO+1Rv7TGggS00X5PXCF9vxykxBpHAbDS+wqNStFICe6urC/qF7xblPLMM8X6 DUKWPM9CbSWRjBsZOsazCkxHeLtUL/7ZYhF7tQgh97Ja6t2KIzYpFT4gc1Qyz0FcpZ ogev3BmRz4pTcxKe/iVQKDoDXbQsvEap9q00+a+Q= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Dmitry Baryshkov , Bjorn Andersson , Sasha Levin Subject: [PATCH 7.0 0513/1146] arm64: dts: qcom: monaco: correct Iris corners for the MXC rail Date: Wed, 20 May 2026 18:12:43 +0200 Message-ID: <20260520162159.795430021@linuxfoundation.org> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260520162148.390695140@linuxfoundation.org> References: <20260520162148.390695140@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 7.0-stable review patch. If anyone has any objections, please let me know. ------------------ From: Dmitry Baryshkov [ Upstream commit bba8d9ba7df8f6592552377049fc84958fd0575a ] The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always match the PLL corners on the MXC rail. Correct the performance corners for the MXC rail following the PLL documentation. Fixes: bf6ec39c3f36 ("arm64: dts: qcom: qcs8300: add video node") Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20260313-iris-fix-corners-v1-3-32a393c25dda@oss.qualcomm.com Signed-off-by: Bjorn Andersson Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/qcom/monaco.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi index 0cb9fd154b684..37d0515e88936 100644 --- a/arch/arm64/boot/dts/qcom/monaco.dtsi +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi @@ -5293,19 +5293,19 @@ opp-366000000 { opp-444000000 { opp-hz = /bits/ 64 <444000000>; - required-opps = <&rpmhpd_opp_nom>, + required-opps = <&rpmhpd_opp_svs_l1>, <&rpmhpd_opp_nom>; }; opp-533000000 { opp-hz = /bits/ 64 <533000000>; - required-opps = <&rpmhpd_opp_turbo>, + required-opps = <&rpmhpd_opp_nom>, <&rpmhpd_opp_turbo>; }; opp-560000000 { opp-hz = /bits/ 64 <560000000>; - required-opps = <&rpmhpd_opp_turbo_l1>, + required-opps = <&rpmhpd_opp_nom>, <&rpmhpd_opp_turbo_l1>; }; }; -- 2.53.0