From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 14AAD472798; Tue, 16 Jun 2026 18:55:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781636109; cv=none; b=T5sFNXLW642u82JdE94t10cqSoQKrHThYCke3U2NRBMqqDy9C2QKW1SK85csLoZu8QlBz0Y1+2fK5ouZjkCgl9R6v9EYw9IsPUmrIA5eQxzw0Nn1lTzdJ1sCgFOua64oSnsGOs1csr6Jc/n56HC0i7SZhRlKXWupVIIwXCGDImA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781636109; c=relaxed/simple; bh=3tKCncAm767M4+3oO4t4ZxBl+Qs5zUrINgrQ5O5WGKA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FBqZLvHg0R0z4wx0i3/uH3hQyiynJblLqAx0MgYnLfFvgaVIUrLO08VBYGptjGzOwE/xSHnCJiptJGzltHIaDviOl205rneF1dZlhNyTzzUTh3WO08XdhnqqsgUimqj4Ktx3ITwUgLrCfufsNYt5py8rp85wit7xJL42Q4tq/0Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=2lrJPgSD; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="2lrJPgSD" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 14D591F000E9; Tue, 16 Jun 2026 18:55:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1781636108; bh=7CI9ayqbIvlIGc8aXhcjA7fTIDItIPf6PKDA7s0vIIw=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=2lrJPgSDaM04uwM/wFpOpdVe2hvC7FXC1sT8c1dD4CC0sYBTTjKUVZmhUe2FzYcTW B0HMed++hy5PUBcsADOkSIJM0numMZ4JwyrAywJII/Ot2HJRig2ps1ueLEyQwTiud/ nnE6TtCYjBK7EyYVMs/puVb6VSLGHxHv8qbSgE0g= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Til Kaiser , Paolo Abeni , Sasha Levin Subject: [PATCH 5.10 177/342] net: mvpp2: sync RX data at the hardware packet offset Date: Tue, 16 Jun 2026 20:27:53 +0530 Message-ID: <20260616145056.450977277@linuxfoundation.org> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616145048.348037099@linuxfoundation.org> References: <20260616145048.348037099@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.10-stable review patch. If anyone has any objections, please let me know. ------------------ From: Til Kaiser [ Upstream commit 180235600934bef6add3be637c296d6cf3272e67 ] mvpp2 programs the RX queue packet offset, so hardware writes received data at dma_addr + MVPP2_SKB_HEADROOM. The current CPU sync starts at dma_addr and only covers rx_bytes + MVPP2_MH_SIZE bytes, which syncs the unused headroom and misses the same number of bytes at the packet tail. On non-coherent DMA systems this can leave the CPU reading stale cache contents for the end of the received frame. Use dma_sync_single_range_for_cpu() with MVPP2_SKB_HEADROOM as the range offset so the sync covers the Marvell header and packet data actually written by hardware. Fixes: e1921168bbd4 ("mvpp2: sync only the received frame") Signed-off-by: Til Kaiser Link: https://patch.msgid.link/20260607134943.21996-2-mail@tk154.de Signed-off-by: Paolo Abeni Signed-off-by: Sasha Levin --- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c index e4e80c2b1ce400..6d672afc73d500 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c @@ -3588,9 +3588,10 @@ static int mvpp2_rx(struct mvpp2_port *port, struct napi_struct *napi, dma_dir = DMA_FROM_DEVICE; } - dma_sync_single_for_cpu(dev->dev.parent, dma_addr, - rx_bytes + MVPP2_MH_SIZE, - dma_dir); + dma_sync_single_range_for_cpu(dev->dev.parent, dma_addr, + MVPP2_SKB_HEADROOM, + rx_bytes + MVPP2_MH_SIZE, + dma_dir); /* Buffer header not supported */ if (rx_status & MVPP2_RXD_BUF_HDR) -- 2.53.0