From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1559F35292A; Tue, 16 Jun 2026 18:19:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781633987; cv=none; b=XlQSGDl3W+64dz0Ih3BSlGaVGjEUHyK9jaNvY6EobrElySmF036z/bZGkJ1BukcOTAkOkbFKk8GyFKkvSR1mZiozcj3O+dAkqAm28JEszGiruXuBLXrKI5qeuueRNWSU13sE6OJvFRRvC1MoicS8nwCKR2zpe2Smy+qt2YRKf74= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781633987; c=relaxed/simple; bh=eDmnEcqZp79ooBv488ETR5HRQ3+JValPZZa8F6IybS0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pD1EOLwUUqEqX0XjL3GZ6yPJW0Vna1alNofqyUjzntWItH/MvXzfdinrfO/PBob7KCk8Oq7aDkLCDPLht8q4MKJ5w2BI+ZIlLIEIsVPl353d3678fgXNZ5ZzmHsecJ/diLb1Fj/ycgTE0Uhf+nAhpv5a5kFiVUZTgMv7nGz1fqU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=R9xpbfIn; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="R9xpbfIn" Received: by smtp.kernel.org (Postfix) with ESMTPSA id EFABF1F000E9; Tue, 16 Jun 2026 18:19:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1781633986; bh=kKDrrGYLHcnxj9mGw1h42iLY8SycjLS2kJudY5Vva+E=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=R9xpbfInANcbpKtMUfahT2oNebqrKolJUrxiUBMPIhodAfFR1PyKSiOGnZdvOfpfI DReTg0IootT3X81iOnUqj3Gu3uColYuDzH2R+V/vGiCK2Fll9ZU9lZlJ4XzY0WOF4H 7ePWpPH+9TSIm2a460lH6XA054K7LQSijnRfWlPc= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Zenghui Yu , Anshuman Khandual , Marc Zyngier , Mark Rutland , Will Deacon , Sasha Levin Subject: [PATCH 5.15 179/411] KVM: arm64: Remove VPIPT I-cache handling Date: Tue, 16 Jun 2026 20:26:57 +0530 Message-ID: <20260616145110.198216938@linuxfoundation.org> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616145100.376842714@linuxfoundation.org> References: <20260616145100.376842714@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: Marc Zyngier commit ced242ba9d7cb3571f6e0f165f643cb832d52148 upstream. We have some special handling for VPIPT I-cache in critical parts of the cache and TLB maintenance. Remove it. Reviewed-by: Zenghui Yu Reviewed-by: Anshuman Khandual Signed-off-by: Marc Zyngier Acked-by: Mark Rutland Link: https://lore.kernel.org/r/20231204143606.1806432-2-maz@kernel.org Signed-off-by: Will Deacon [Mark: Backport to v5.15.y. VPIPT HW was never built; this is all dead code] Signed-off-by: Mark Rutland Signed-off-by: Sasha Levin --- arch/arm64/include/asm/kvm_mmu.h | 4 ++-- arch/arm64/kvm/hyp/nvhe/tlb.c | 35 -------------------------------- arch/arm64/kvm/hyp/vhe/tlb.c | 13 ------------ 3 files changed, 2 insertions(+), 50 deletions(-) diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h index 02d37888774383..1733eb87c29fbb 100644 --- a/arch/arm64/include/asm/kvm_mmu.h +++ b/arch/arm64/include/asm/kvm_mmu.h @@ -207,8 +207,8 @@ static inline void __invalidate_icache_guest_page(void *va, size_t size) if (icache_is_aliasing()) { /* any kind of VIPT cache */ icache_inval_all_pou(); - } else if (is_kernel_in_hyp_mode() || !icache_is_vpipt()) { - /* PIPT or VPIPT at EL2 (see comment in __kvm_tlb_flush_vmid_ipa) */ + } else { + /* PIPT */ icache_inval_pou((unsigned long)va, (unsigned long)va + size); } } diff --git a/arch/arm64/kvm/hyp/nvhe/tlb.c b/arch/arm64/kvm/hyp/nvhe/tlb.c index d296d617f58963..291789df24e3ee 100644 --- a/arch/arm64/kvm/hyp/nvhe/tlb.c +++ b/arch/arm64/kvm/hyp/nvhe/tlb.c @@ -84,28 +84,6 @@ void __kvm_tlb_flush_vmid_ipa(struct kvm_s2_mmu *mmu, dsb(ish); isb(); - /* - * If the host is running at EL1 and we have a VPIPT I-cache, - * then we must perform I-cache maintenance at EL2 in order for - * it to have an effect on the guest. Since the guest cannot hit - * I-cache lines allocated with a different VMID, we don't need - * to worry about junk out of guest reset (we nuke the I-cache on - * VMID rollover), but we do need to be careful when remapping - * executable pages for the same guest. This can happen when KSM - * takes a CoW fault on an executable page, copies the page into - * a page that was previously mapped in the guest and then needs - * to invalidate the guest view of the I-cache for that page - * from EL1. To solve this, we invalidate the entire I-cache when - * unmapping a page from a guest if we have a VPIPT I-cache but - * the host is running at EL1. As above, we could do better if - * we had the VA. - * - * The moral of this story is: if you have a VPIPT I-cache, then - * you should be running with VHE enabled. - */ - if (icache_is_vpipt()) - icache_inval_all_pou(); - __tlb_switch_to_host(&cxt); } @@ -144,18 +122,5 @@ void __kvm_flush_vm_context(void) { dsb(ishst); __tlbi(alle1is); - - /* - * VIPT and PIPT caches are not affected by VMID, so no maintenance - * is necessary across a VMID rollover. - * - * VPIPT caches constrain lookup and maintenance to the active VMID, - * so we need to invalidate lines with a stale VMID to avoid an ABA - * race after multiple rollovers. - * - */ - if (icache_is_vpipt()) - asm volatile("ic ialluis"); - dsb(ish); } diff --git a/arch/arm64/kvm/hyp/vhe/tlb.c b/arch/arm64/kvm/hyp/vhe/tlb.c index 24cef9b87f9e9c..fc3fcd29ccc306 100644 --- a/arch/arm64/kvm/hyp/vhe/tlb.c +++ b/arch/arm64/kvm/hyp/vhe/tlb.c @@ -146,18 +146,5 @@ void __kvm_flush_vm_context(void) { dsb(ishst); __tlbi(alle1is); - - /* - * VIPT and PIPT caches are not affected by VMID, so no maintenance - * is necessary across a VMID rollover. - * - * VPIPT caches constrain lookup and maintenance to the active VMID, - * so we need to invalidate lines with a stale VMID to avoid an ABA - * race after multiple rollovers. - * - */ - if (icache_is_vpipt()) - asm volatile("ic ialluis"); - dsb(ish); } -- 2.53.0