From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D8373D8105; Tue, 16 Jun 2026 18:21:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781634106; cv=none; b=PNcYNHXf/7hnQU6DE/CCHYy4L9QtrdPnd5edFOCGiAoGzloaGuC34iHou6HgeMxysVhDOkVHnQUDKsDGu9tTkY9Y1eoAw29whCP+qiUz4dFSGrj/+8cNerPb1laMTIFsP6lCneTlXvCYLKF5EqfQJwk3jqLDaVk0BjJjbR/hrDQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781634106; c=relaxed/simple; bh=L+p40LhOsKRJL2XOmK6KkgtYLky/VL33fTAYcxaGuFM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UKSnWecUL3UKfWmZLe84krJ3WhGQ3MtngPloLs8roPcNiCzkSEqAX8R7zbs95oQ7WkEeq0JAU8uNh9F7hXa3igf57JFksSubQ73E8fjGVrwcv+Q/jV8DExPm+44r7C/2Nof54QIMMcJB7tqj0dj3NBkimj7Jw8yQpZr+2ofjbm8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=yp2hfejo; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="yp2hfejo" Received: by smtp.kernel.org (Postfix) with ESMTPSA id EC0641F000E9; Tue, 16 Jun 2026 18:21:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1781634105; bh=8f/8GPvvtkNElN90YiDya8jVOXZ6cYdVyyTaM3XWNmc=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=yp2hfejoLf6ihMoqhrPCSXgVh1oZMmts9ttE0l9fkxk8rNNDDH56Au59P4SdDjXxa oHhaYVjwQE4V3ZDPni2SKx0NeNL9cD64bCGGYU7nwcN37fVoGxErlklY7GXl83+8+T OT4jmM1LuOb3EmB9hxgVb/aUijBwdsx9X8b5lMbc= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Til Kaiser , Paolo Abeni , Sasha Levin Subject: [PATCH 5.15 195/411] net: mvpp2: sync RX data at the hardware packet offset Date: Tue, 16 Jun 2026 20:27:13 +0530 Message-ID: <20260616145111.084872505@linuxfoundation.org> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616145100.376842714@linuxfoundation.org> References: <20260616145100.376842714@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: Til Kaiser [ Upstream commit 180235600934bef6add3be637c296d6cf3272e67 ] mvpp2 programs the RX queue packet offset, so hardware writes received data at dma_addr + MVPP2_SKB_HEADROOM. The current CPU sync starts at dma_addr and only covers rx_bytes + MVPP2_MH_SIZE bytes, which syncs the unused headroom and misses the same number of bytes at the packet tail. On non-coherent DMA systems this can leave the CPU reading stale cache contents for the end of the received frame. Use dma_sync_single_range_for_cpu() with MVPP2_SKB_HEADROOM as the range offset so the sync covers the Marvell header and packet data actually written by hardware. Fixes: e1921168bbd4 ("mvpp2: sync only the received frame") Signed-off-by: Til Kaiser Link: https://patch.msgid.link/20260607134943.21996-2-mail@tk154.de Signed-off-by: Paolo Abeni Signed-off-by: Sasha Levin --- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c index fdfdd55fdb1dcf..ad6325c80f9868 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c @@ -3945,9 +3945,10 @@ static int mvpp2_rx(struct mvpp2_port *port, struct napi_struct *napi, dma_dir = DMA_FROM_DEVICE; } - dma_sync_single_for_cpu(dev->dev.parent, dma_addr, - rx_bytes + MVPP2_MH_SIZE, - dma_dir); + dma_sync_single_range_for_cpu(dev->dev.parent, dma_addr, + MVPP2_SKB_HEADROOM, + rx_bytes + MVPP2_MH_SIZE, + dma_dir); /* Buffer header not supported */ if (rx_status & MVPP2_RXD_BUF_HDR) -- 2.53.0