From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B0C1947AF6E; Tue, 16 Jun 2026 17:40:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781631644; cv=none; b=kiGv9Y1afR/1ssKyJl61LTSD9k/tnXp6efXvn+gQQL6suoHAIqhzwNxE/Xa3v7/+gpBXf3lUaXDOuLKzKzCi7IAVKTTrOrTZK8+YGyp6/7WE3FyCMfBTZsCXUMSyA+hKtrjrw8nNeyikBYXqANhpizKMnuNxM5Fj/C68Y9MQCmQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781631644; c=relaxed/simple; bh=xUobUleStuu5j5Jy1is6v6Q+pomFAvxnMur7+zcDTYo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JV77LBiL1iVyUiwOIq0RBcoy0Q+mVHo+FvDNQ+sRb8tjC1AfF28leN6V998biDZFZowBQQc80yQ7pmytdwzXffkVyO/ZmxVGCupcq0gMd92qDc1Jkk82cvPW1UUwkDsZr+gDQ7PT5ttsfU28FuntqOflLqviaMlZuACf5vaTlSk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=kBIA78S4; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="kBIA78S4" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A3C901F00A3A; Tue, 16 Jun 2026 17:40:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1781631643; bh=gpUb/yNMd58vZK+hx1rdIYPU59KiQDkcBDuYPr78sd0=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=kBIA78S4k8MkRuMe68gMNPSU6W+5bSKfr8n4U87no4l9ypBalKRz2zWOpt81vqOVS Yrv9Z9f2POlSadIh0MoJEIrV5CgIvfxL1cFJpmoirdF7qhBcEa16qu+/Ow6FRNY7Ng oNaMvXhZsHc/OdYA4zcQw8h6lioif8dtNeh0vvQo= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Til Kaiser , Paolo Abeni , Sasha Levin Subject: [PATCH 6.1 260/522] net: mvpp2: sync RX data at the hardware packet offset Date: Tue, 16 Jun 2026 20:26:47 +0530 Message-ID: <20260616145138.109035489@linuxfoundation.org> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616145125.307082728@linuxfoundation.org> References: <20260616145125.307082728@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.1-stable review patch. If anyone has any objections, please let me know. ------------------ From: Til Kaiser [ Upstream commit 180235600934bef6add3be637c296d6cf3272e67 ] mvpp2 programs the RX queue packet offset, so hardware writes received data at dma_addr + MVPP2_SKB_HEADROOM. The current CPU sync starts at dma_addr and only covers rx_bytes + MVPP2_MH_SIZE bytes, which syncs the unused headroom and misses the same number of bytes at the packet tail. On non-coherent DMA systems this can leave the CPU reading stale cache contents for the end of the received frame. Use dma_sync_single_range_for_cpu() with MVPP2_SKB_HEADROOM as the range offset so the sync covers the Marvell header and packet data actually written by hardware. Fixes: e1921168bbd4 ("mvpp2: sync only the received frame") Signed-off-by: Til Kaiser Link: https://patch.msgid.link/20260607134943.21996-2-mail@tk154.de Signed-off-by: Paolo Abeni Signed-off-by: Sasha Levin --- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c index b42c2c498faa2e..62d72f5ed01295 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c @@ -3948,9 +3948,10 @@ static int mvpp2_rx(struct mvpp2_port *port, struct napi_struct *napi, dma_dir = DMA_FROM_DEVICE; } - dma_sync_single_for_cpu(dev->dev.parent, dma_addr, - rx_bytes + MVPP2_MH_SIZE, - dma_dir); + dma_sync_single_range_for_cpu(dev->dev.parent, dma_addr, + MVPP2_SKB_HEADROOM, + rx_bytes + MVPP2_MH_SIZE, + dma_dir); /* Buffer header not supported */ if (rx_status & MVPP2_RXD_BUF_HDR) -- 2.53.0