From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 72B1744AB8D; Tue, 21 Jul 2026 21:31:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784669466; cv=none; b=ASWIncb9Vyv50zhHF4Y/mcYf6lVb3Z7fArIaphfOkPttO6DGEB3rV42IC01mLgHO+kHUbWFoVhd7L2Pae7VD0RjZcIfoHmnLj0pnqEtaMk9yrmmt/AHniD1+QbyS8x0MXvlGvdiMDVzfBrw6+roKjcUC4sH0HEN/i0VXfKIof0g= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784669466; c=relaxed/simple; bh=xrv/Zk+bjawn/litGHrtrBLKubjc0B7WazNexwVLIwo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=WeatARi+L2+8vXKQLu+nCAgxF3naC+Huh2w5jtrblC8+kudgjK9mjQfUvG9U6Z4nRKE041i2gnlb/BnihK94+3mAPsdauDjk9QASRYaLgBbFpEvVqPIPkhqMeQXYE5T2P9hsgBODgYBfVUQtnN2kL1YAsBeg7gnlDu8fBy2SYa0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=VxAHj1F1; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="VxAHj1F1" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8F1381F00A3A; Tue, 21 Jul 2026 21:31:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1784669465; bh=fCOKHAjQ3G81hkYBWscAjYt/64mXDerOphnGLxd3Vmk=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=VxAHj1F1wc3vhtBM9n9AEfLi/Q7sajigc1ggFhLLm0RwlZGOEbuJNmkmVoV9mE1wz 6DFJ4Csdc5nqWProUOm5tN2VTKrCKniwRifbT+wTA3d0cCTtMtyNC1FAFv6r6OrYk5 6eTBOMWN1CwN66rM7g9QTMDgUCMdpQ3aiFFK8mZ0= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Li RongQing , Manivannan Sadhasivam , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Sasha Levin Subject: [PATCH 6.1 0522/1067] PCI: mediatek: Fix operator precedence in PCIE_FTS_NUM_L0 macro Date: Tue, 21 Jul 2026 17:18:43 +0200 Message-ID: <20260721152436.288494306@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260721152424.521567757@linuxfoundation.org> References: <20260721152424.521567757@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 6.1-stable review patch. If anyone has any objections, please let me know. ------------------ From: Li RongQing [ Upstream commit 282305d7e9c0e27fd8b4df34b7cd5506a1eccdd6 ] The original PCIE_FTS_NUM_L0(x) macro was buggy due to improper operator precedence, where ((x) & 0xff << 8) was evaluated as ((x) & 0xff00). Instead of just fixing the parentheses, use the standard FIELD_PREP() macro. This makes the code more robust by automatically handling masks and shifts, while also adding compile-time type and range checking to ensure the value fits within PCIE_FTS_NUM_MASK. Fixes: 637cfacae96f ("PCI: mediatek: Add MediaTek PCIe host controller support") Signed-off-by: Li RongQing [mani: added the bitfield header include spotted by Sashiko] Signed-off-by: Manivannan Sadhasivam Reviewed-by: Krzysztof Wilczyński Link: https://patch.msgid.link/20260515005552.2343-1-lirongqing@baidu.com Signed-off-by: Sasha Levin --- drivers/pci/controller/pcie-mediatek.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c index 03ac5df9bb1298..1e3a8461b5ce01 100644 --- a/drivers/pci/controller/pcie-mediatek.c +++ b/drivers/pci/controller/pcie-mediatek.c @@ -7,6 +7,7 @@ * Honghui Zhang */ +#include #include #include #include @@ -60,7 +61,7 @@ /* MediaTek specific configuration registers */ #define PCIE_FTS_NUM 0x70c #define PCIE_FTS_NUM_MASK GENMASK(15, 8) -#define PCIE_FTS_NUM_L0(x) ((x) & 0xff << 8) +#define PCIE_FTS_NUM_L0(x) FIELD_PREP(PCIE_FTS_NUM_MASK, x) #define PCIE_FC_CREDIT 0x73c #define PCIE_FC_CREDIT_MASK (GENMASK(31, 31) | GENMASK(28, 16)) -- 2.53.0