From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EDCC039EF16; Tue, 21 Jul 2026 15:45:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784648730; cv=none; b=d7UaC8b4IqGeeucJoKFAtYte3TOkZPscRMDavWGi9aHSUpSdAvu4CxxXcE40jnlOa7vQD2BCOBHop/5RCivZqF4pxIuBFhWexjXKDQJsEyOiGpZk9vSSD8enqkaGt2QzEYyzTlnroEY/StH/4Vtd/++HOl6//l1PBsQ8ApNWU48= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784648730; c=relaxed/simple; bh=z435Fd573FWjw6lHVg9Cp4ZLZNmPLHHFOHCW885UQlw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WnW/fnEAD9vvXz1qNdwhIkUvzCCsF5Lc+zxyZZsiPKDZ5HRf1CYjiSU+fW3Z1aFVAFrN+V8xzIFrPP/L/ZN8If+o92bqhrzDyqs0nJ42sm1/iPMcUbJ3usmxK4kJJYohWs74+YsEtDXOONAGp9kh8bwc/C86UGEiBGwd5M1lOx0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=WyMa88L7; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="WyMa88L7" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5F0EE1F00A3A; Tue, 21 Jul 2026 15:45:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1784648727; bh=QhFJZvSLNts/UQEAUwy78GbVEyjOnR+ZENmZNnBOiSY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=WyMa88L7D2BqFFLGMGYmL/9i+EVbCnfFhud8dWcJ9Re5kXghmoW4BjoAqJxYlepNi obLXNoKz/QwCWrsn3pTnMmBMWoUIoV6MTEShm0KJHXO0/nLPRTb83d4Xehx5HsrwHN pOqOmw7Ur/fxf1DWePUPlVxrUkH8c81JsqcHagW0= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Konrad Dybcio , Kuldeep Singh , Harshal Dev , Bjorn Andersson , Sasha Levin Subject: [PATCH 7.1 0272/2077] arm64: dts: qcom: sm8750: Add power-domain and iface clk for ice node Date: Tue, 21 Jul 2026 16:59:05 +0200 Message-ID: <20260721152559.094361273@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260721152552.646164743@linuxfoundation.org> References: <20260721152552.646164743@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 7.1-stable review patch. If anyone has any objections, please let me know. ------------------ From: Harshal Dev [ Upstream commit 081ac792f0ea6d27a4b130c70cfd7544efee8137 ] Qualcomm in-line crypto engine (ICE) platform driver specifies and votes for its own resources. Before accessing ICE hardware during probe, to avoid potential unclocked register access issues (when clk_ignore_unused is not passed on the kernel command line), in addition to the 'core' clock the 'iface' clock should also be turned on by the driver. This can only be done if the GCC_UFS_PHY_GDSC power domain is enabled. Specify both the GCC_UFS_PHY_GDSC power domain and the 'iface' clock in the ICE node for sm8750. Fixes: b1dac789c650a ("arm64: dts: qcom: sm8750: Add ICE nodes") Reviewed-by: Konrad Dybcio Reviewed-by: Kuldeep Singh Signed-off-by: Harshal Dev Link: https://lore.kernel.org/r/20260416-qcom_ice_power_and_clk_vote-v5-11-5ccf5d7e2846@oss.qualcomm.com Signed-off-by: Bjorn Andersson Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/qcom/sm8750.dtsi | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi index 320aec62e462d2..2d2f029c2d6fe8 100644 --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi @@ -2086,7 +2086,11 @@ ice: crypto@1d88000 { "qcom,inline-crypto-engine"; reg = <0x0 0x01d88000 0x0 0x18000>; - clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; + clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>, + <&gcc GCC_UFS_PHY_AHB_CLK>; + clock-names = "core", + "iface"; + power-domains = <&gcc GCC_UFS_PHY_GDSC>; }; cryptobam: dma-controller@1dc4000 { -- 2.53.0