From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1636744A739; Thu, 30 Jul 2026 16:12:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785427924; cv=none; b=HzWl28MFioQ3SOpREEWYnNiJ8pIhGvhm+T6JJysxztW3T7kHwxB3urfgAmkbJ1iZpFtGIUWJtxwTedP+kQesm7j94/thlcAoAbd/mXpUqbaQT+5tcwvY9p2gaGpREGaWJMpYT5k2oQ2C5TYLosxdocwTUXUcbJG60IOYip4WCJk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785427924; c=relaxed/simple; bh=C6e8aGAcL+SiiN1mOLQytcCB6W0qaDrsww2HsLYud20=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SNkF+K80EdyggbPIPlRabCYh4yI1tiu3xtUjszAeeDT72+vJ0SJF/pvjZ50/OoDgzN26gbeh6sPnc+Y02QKFFoOi1lrOjlxIUQtMi9VHHPSdyMCmYT1umtf4OpfR2ZsxKyADn+V9jrNIcEp1yRlkFVO4X3G1DsdWIyHoc7iqB9k= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=0HlKdjfk; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="0HlKdjfk" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 941071F000E9; Thu, 30 Jul 2026 16:12:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1785427923; bh=aNeGaeTUeCvMeGOpJO/RYuKht6iVkbx2pAdN6I98Us4=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=0HlKdjfkFe3fuBZHZdP8frabvUg0Ux8n90nB7dEnhdWNq5gJNt6UWtY/uxW3Y/xD0 0RugP1mo9aeMAeN1t4VanCeK+hS98vmvS0ZTzBFuxOy0kgkLyo9PHqKJ4ERHQb3X6+ Jz2gw3x3+yCWMNgChoOkVy28/Yp5Gpzq8u1TyIV4= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Vitaly Prosyak , Alex Deucher Subject: [PATCH 6.6 341/484] drm/amdgpu/gfx9: replace BUG_ON() with WARN_ON() Date: Thu, 30 Jul 2026 16:13:58 +0200 Message-ID: <20260730141430.888580060@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260730141423.392222816@linuxfoundation.org> References: <20260730141423.392222816@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.6-stable review patch. If anyone has any objections, please let me know. ------------------ From: Alex Deucher commit 6302be10b521f5106ce01eb5a724b9e7945a5061 upstream. There's no need to crash the kernel for these cases. Reviewed-by: Vitaly Prosyak Signed-off-by: Alex Deucher (cherry picked from commit b71604f8685b0eba07866f4e8dc30f93e1931054) Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -983,7 +983,7 @@ static void gfx_v9_0_wait_reg_mem(struct WAIT_REG_MEM_ENGINE(eng_sel))); if (mem_space) - BUG_ON(addr0 & 0x3); /* Dword align */ + WARN_ON(addr0 & 0x3); /* Dword align */ amdgpu_ring_write(ring, addr0); amdgpu_ring_write(ring, addr1); amdgpu_ring_write(ring, ref); @@ -5166,7 +5166,7 @@ static void gfx_v9_0_ring_emit_ib_gfx(st } amdgpu_ring_write(ring, header); - BUG_ON(ib->gpu_addr & 0x3); /* Dword align */ + WARN_ON(ib->gpu_addr & 0x3); /* Dword align */ amdgpu_ring_write(ring, #ifdef __BIG_ENDIAN (2 << 0) | @@ -5278,7 +5278,7 @@ static void gfx_v9_0_ring_emit_ib_comput } amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); - BUG_ON(ib->gpu_addr & 0x3); /* Dword align */ + WARN_ON(ib->gpu_addr & 0x3); /* Dword align */ amdgpu_ring_write(ring, #ifdef __BIG_ENDIAN (2 << 0) | @@ -5319,9 +5319,9 @@ static void gfx_v9_0_ring_emit_fence(str * aligned if only send 32bit data low (discard data high) */ if (write64bit) - BUG_ON(addr & 0x7); + WARN_ON(addr & 0x7); else - BUG_ON(addr & 0x3); + WARN_ON(addr & 0x3); amdgpu_ring_write(ring, lower_32_bits(addr)); amdgpu_ring_write(ring, upper_32_bits(addr)); amdgpu_ring_write(ring, lower_32_bits(seq));